Semiconductor Memory Device Bit Line Voltage Control
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The semiconductor memory device, particularly flash memory, faces challenges in maintaining reliable threshold voltage distribution due to increased voltage distribution ranges, which affects data retention and operational efficiency.
Innovation Solution
A semiconductor memory device with a memory array and peripheral circuit that adjusts the bit line voltage based on the threshold voltage of program target cells during programming, using a string connection circuit to maintain or block connections between memory cells and source select transistors, and applying specific voltages to word lines for precharging and discharging channels.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional programming is used, then programming speed is maintained, but threshold voltage distribution reliability deteriorates
Solution Approach 1:
The patent segments the memory strings into two distinct groups: target strings containing program target cells and non-target strings containing program inhibition cells. This segmentation is achieved through the string connection circuit that selectively connects or disconnects strings from the bit line based on whether they contain target or non-target cells. By treating these groups differently during programming, the patent improves threshold voltage distribution reliability while maintaining programming speed.
Solution Approach 2:
The patent dynamically adjusts the connection state of memory strings during the programming operation. The string connection circuit changes the connection between memory cells and the bit line based on the programming stage and cell type. During initial programming, all strings are connected; during verification and additional programming, only target strings remain connected while non-target strings are disconnected. This dynamic adjustment optimizes both reliability and programming efficiency.
2Reliability
If bit line voltage is not adjusted, then programming simplicity is maintained, but threshold voltage distribution deteriorates
Solution Approach 1:
The patent implements a feedback mechanism where the string connection circuit monitors the programming status and threshold voltage distribution, then adjusts the connection state of memory strings accordingly. During verification, if program inhibition cells are detected to have insufficient threshold voltage, the circuit prevents further programming of those cells by disconnecting them from the bit line. This feedback-based control improves threshold voltage distribution while managing complexity through automated control logic.
Solution Approach 2:
The patent changes the electrical parameters (connection state) of memory strings based on their programming status and cell type. The string connection circuit alters the resistance and conductivity of the programming path by selectively connecting or disconnecting strings from the bit line. This parameter change approach allows precise control over which cells receive programming pulses, improving threshold voltage distribution without requiring complex voltage modulation circuits.
3Reliability
If all memory cells are programmed simultaneously, then programming speed is maintained, but program inhibition cells experience unnecessary stress
Solution Approach 1:
The patent segments the programming process into two distinct phases: initial programming where all strings are connected and programmed simultaneously, and additional programming where only target strings remain connected. This segmentation eliminates unnecessary programming stress on program inhibition cells during the verification phase while maintaining high programming efficiency during the initial phase. The string connection circuit enables this by disconnecting non-target strings only when needed.
Solution Approach 2:
The patent performs preliminary programming of all memory cells before verification, ensuring that program inhibition cells are not subjected to additional unnecessary stress. The string connection circuit is configured to automatically disconnect non-target strings after the initial programming phase, preventing further stress accumulation. This preliminary action approach maintains programming efficiency while protecting program inhibition cells from excessive stress.
Data Source
AI summary
A semiconductor memory device includes: a memory array including a plurality of memory cells; and a peripheral circuit configured to change a voltage level of a bit line connected to a program target cell according to a threshold voltage of the program target cell among the memory cells during a program operation.