Memory Error Correction Using Physical Bit Reliability Groups

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Solution Overview

Problem

Existing error correction methods for memory storage face challenges in accurately identifying and correcting errors due to physical property drift and variations in memory cells, leading to unreliable data retrieval.

Innovation Solution

An apparatus and method that utilize an array of memory cells and a controller to read encoded bits, divide them into reliability groups based on persistent physical characteristics, and provide these estimates to a soft decision decoder for improved error correction.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If traditional error correction methods are used without considering physical characteristics, then the decoding process is simpler, but the accuracy of error identification and correction deteriorates

Engineering Contradiction:
Improveerror identification accuracyVSAvoiddecoding process complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The system performs preliminary assessment of bit reliability based on physical characteristics (such as resistance values in resistive memory) before the decoding process. This preliminary action groups bits into reliability categories, providing the decoder with advance information about which bits are more likely to be erroneous, thereby improving error identification accuracy without significantly increasing decoding complexity

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent introduces an intermediary reliability assessment mechanism that bridges the physical memory characteristics and the logical decoding process. This intermediary layer translates physical properties (like resistance measurements) into reliability estimates that guide the decoder, improving accuracy while maintaining a clear separation between physical measurement and logical correction functions

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If memory cells are monitored continuously for physical property drift, then data reliability improves, but the time and resources required for monitoring and recalibration increase

Engineering Contradiction:
Improvedata retrieval reliabilityVSAvoidrecalibration time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The system implements periodic monitoring of physical characteristics at predetermined intervals or after specific numbers of write cycles, rather than continuous monitoring. This periodic approach maintains data reliability by detecting drift at appropriate intervals while minimizing the time and resources spent on monitoring, as the memory can operate normally between monitoring events

Inventive Principle:
Principle #19Periodic action

Solution Approach 2:

The patent monitors changes in physical parameters (such as resistance values) over time and triggers recalibration only when these parameters exceed predetermined thresholds. This approach improves reliability by detecting actual drift conditions while avoiding unnecessary recalibrations, thereby reducing the time and resources wasted on frequent recalibration operations

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS11601141B2Error correction based on physical characteristics for memory
Publication Date: 2023.03.07 SANDISK TECHNOLOGIES LLC
  • US11601141B2 patent drawing
  • US11601141B2 patent drawing
  • US11601141B2 patent drawing

AI summary

Apparatuses, systems, and methods are presented for error correction based on physical characteristics for memory. A controller may be configured to read a set of encoded bits from a set of cells of a memory array. The controller may be configured to divide the encoded bits into reliability groups based on one or more persistent physical characteristics associated with cells of the set of cells. The controller may be configured to provide reliability estimates based on the reliability groups to a soft decision decoder for decoding the encoded bits.