In-Memory Bit String Computing With Posit Format Precision
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Solution Overview
Problem
Current memory systems face limitations in performing bit string operations due to finite memory resources and the inefficiencies of traditional floating-point formats, which restrict accuracy, precision, and processing speed.
Innovation Solution
The implementation of posit format bit strings within memory arrays, allowing for higher precision, dynamic range, and accuracy through variable bit length configurations, enabling faster processing and reduced memory requirements by converting bit strings between formats within the memory array using sensing circuitry.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If traditional floating-point formats are used in memory systems, then compatibility with existing systems is maintained, but accuracy and precision are restricted
Solution Approach 1:
The patent changes the fundamental parameter of number representation from traditional floating-point format to posit format. This format transformation enables higher precision and accuracy in bit string operations while utilizing memory resources more efficiently. The posit format's variable precision characteristics allow accurate representation of numbers with fewer bits, directly resolving the contradiction between accuracy and memory resource requirements.
Solution Approach 2:
The patent implements dynamic bit string operations where the precision and length of bit strings can be dynamically adjusted based on the specific computational requirements. The sensing circuitry performs operations on bit strings of varying lengths, allowing the system to optimize between precision and resource usage dynamically rather than being constrained by fixed-format requirements.
2Productivity
If bit string operations are performed externally to the memory array, then processing capability is sufficient, but processing time increases
Solution Approach 1:
The patent merges the computational functionality with the memory array by enabling bit string operations to be performed directly within the memory array using integrated sensing circuitry. This combination of storage and computation functions eliminates the need to transfer data between memory and external processing units, significantly improving processing speed while the added computational capability is achieved through existing memory infrastructure.
Solution Approach 2:
The memory array performs bit string operations on its own stored data without requiring external processing assistance. The sensing circuitry within the memory array executes arithmetic and logical operations directly on the bit strings, allowing the memory system to serve its own computational needs and reducing dependency on external processors.
3Measurement precision
If fixed bit length configurations are used, then implementation is simple, but precision and dynamic range are limited
Solution Approach 1:
The patent implements dynamic bit string configurations where the length and precision of bit strings can be adjusted based on computational requirements. The sensing circuitry is designed to handle variable-length bit strings, allowing the system to optimize precision for different operations without requiring complex fixed-precision infrastructure for each possible precision level.
Solution Approach 2:
The patent changes the bit string format parameter from fixed-length to variable-length configurations. This parameter change enables the system to achieve higher precision when needed while maintaining implementation feasibility through the use of standard sensing circuitry that can naturally accommodate variable-length data structures.
Data Source
AI summary
Systems, apparatuses, and methods related to bit string operations in memory are described. The bit string operations may be performed within a memory array without transferring the bit strings or intermediate results of the operations to circuitry external to the memory array. For instance, sensing circuitry that can include a sense amplifier and a compute component can be coupled to a memory array. A controller can be coupled to the sensing circuitry and can be configured to cause one or more bit strings that are formatted according to a universal number format or a posit format to be transferred from the memory array to the sensing circuitry. The sensing circuitry can perform an arithmetic operation, a logical operation, or both using the one or more bit strings.