Memory Block Allocation Using Zone Reset Counters

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Solution Overview

Problem

Existing memory sub-systems face inefficiencies in block allocation and erase techniques, particularly in sequentially-written memory devices, leading to issues like inaccurate data representation due to threshold voltage shifts and increased latency from calibration scans and re-erase operations.

Innovation Solution

Implementing a memory sub-system controller that allocates blocks based on zone frequency of use, using zone reset counters and program erase counters to differentiate between hot and cold zones, and adjusting the threshold capacity level to minimize the time blocks remain in the free block list, thereby reducing the need for calibration scans and re-erase operations.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If blocks are allocated to the free block list without considering zone frequency of use, then block allocation is simple, but threshold voltage shifts occur causing inaccurate data representation

Engineering Contradiction:
Improvedata representation accuracyVSAvoidblock allocation complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent changes the parameter of block allocation by introducing zone frequency of use (hot vs. cold zones) and program erase counters as selection criteria. Instead of simple round-robin or random allocation, blocks are selectively allocated based on these parameters to minimize time in the free block list and prevent threshold voltage shifts.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent replaces the traditional mechanical wear-leveling approach with a data-driven allocation system that uses zone reset counters and program erase counters to make intelligent decisions about block allocation, thereby improving data accuracy without excessive complexity.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

2Measurement precision

If calibration scans are performed on all blocks before writing, then data accuracy is ensured, but latency increases

Engineering Contradiction:
Improvedata accuracyVSAvoidwrite latency
Core Design Contradiction:
Measurement precisionVSLoss of time

Solution Approach 1:

The patent extracts the calibration scan operation from being a universal requirement and applies it selectively only to blocks that are actually being written to. By using the optimized allocation strategy, blocks are pre-selected to minimize threshold voltage shifts, so calibration scans are performed only when necessary, reducing overall latency while maintaining data accuracy.

Inventive Principle:
Principle #2Taking out (Extraction)

3Reliability

If re-erase operations are performed on blocks in the free block list, then threshold voltage shifts are corrected, but device endurance decreases

Engineering Contradiction:
Improvedata reliabilityVSAvoiddevice lifespan
Core Design Contradiction:
ReliabilityVSDuration of action of stationary object

Solution Approach 1:

The patent performs preliminary actions by allocating blocks strategically before they are written to, using zone frequency of use and program erase counters to select blocks that are less likely to experience threshold voltage shifts. This preliminary optimization reduces or eliminates the need for corrective re-erase operations, thereby maintaining data reliability while preserving device lifespan.

Inventive Principle:
Principle #10Preliminary action

4Reliability

If blocks remain in the free block list for extended periods, then wear leveling is improved, but threshold voltage shifts occur causing data inaccuracies

Engineering Contradiction:
Improvewear levelingVSAvoiddata accuracy
Core Design Contradiction:
ReliabilityVSMeasurement precision

Solution Approach 1:

The patent changes the allocation parameters to consider both wear leveling (program erase counters) and data accuracy (zone frequency of use). By allocating blocks from cold zones with appropriate erase counts, the system optimizes the balance between wear leveling and minimizing threshold voltage shifts, ensuring both reliability and data accuracy.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS20250130734A1Block allocation and erase techniques for sequentially-written memory devices
Publication Date: 2025.04.24 MICRON TECHNOLOGY INC
  • US20250130734A1 patent drawing
  • US20250130734A1 patent drawing
  • US20250130734A1 patent drawing

AI summary

A reset counter associated with a zone of the memory device is maintained. The reset counter represents a number of times the zone has been reset. In response to receiving a write command directed to the zone of the memory device, a target portion of the zone that is not open is identified. A first portion from a free portion list is identified. The program erase count of the first portion corresponds to the reset counter associated with the zone. The first portion is allocated to the zone.