Memory Block Area Checks for Bad Block Isolation
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Solution Overview
Problem
Non-volatile memory devices may contain bad blocks where normal operations are not guaranteed, leading to inefficiencies and potential data loss due to failed read or program operations.
Innovation Solution
A memory device with a first and second area, each coupled to identical word lines, performs separate operations on these areas and stores results indicating success or failure, allowing a storage controller to determine and isolate fail areas within a target block, thereby preventing operations on unreliable areas.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the storage controller performs operations on all memory blocks without distinction, then the device complexity is low, but the reliability deteriorates due to operations on bad blocks
Solution Approach 1:
The memory block is divided into multiple areas (first area, second area, etc.), each coupled to different pass gate groups. The control circuit performs operations on each area separately and stores individual results, enabling granular identification of defective areas without requiring complex external intervention.
Solution Approach 2:
The control circuit performs operations on different areas of the memory block in a predetermined sequence (first area, then second area, etc.) before finalizing the bad block determination. This preliminary sequential operation allows the system to identify and isolate defective areas early in the process.
2Reliability
If the storage controller checks each memory block individually for bad blocks, then the reliability improves, but the productivity deteriorates due to increased check time
Solution Approach 1:
By segmenting the memory block into multiple areas and checking them separately with different pass gate groups, the system can identify exactly which area is defective. This prevents unnecessary rejection of entire memory blocks when only a small area is problematic, thereby improving overall productivity.
Solution Approach 2:
The patent applies local quality by treating different areas of the memory block differently based on their operational results. Each area is independently evaluated and marked as pass or fail, allowing the system to maintain high reliability while maximizing usable memory capacity.
3Reliability
If the storage controller uses multiple pass gate groups for different areas, then the reliability improves through better defect isolation, but the device complexity increases
Solution Approach 1:
The memory block is segmented into multiple areas, each associated with different pass gate groups. This segmentation enables the control circuit to selectively activate specific pass gate groups for reading different areas, improving defect isolation capability while maintaining manageable complexity through systematic organization.
Solution Approach 2:
Multiple pass gate groups serve universal functions of selecting and isolating different areas of the memory block. Each pass gate group can be activated based on the target area, providing a flexible and multi-functional mechanism for defect isolation without requiring completely separate circuitry for each area.
Data Source
AI summary
Provided herein may be a memory device for performing a bad block check, a method of operating the memory device, and a method of operating a storage controller communicating with the memory device. The memory device may include a first area including a first memory cell, a second area including a second memory cell, the first memory cell and the second memory cell coupled to an identical word line, and a control circuit configured to perform a first operation on the first area and a second operation on the second area and configured to store a first result indicating whether the first operation has succeeded and a second result indicating whether the second operation has succeeded.