Memory Block Defect Detection via Threshold Voltage Scan
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Solution Overview
Problem
Memory devices face challenges in efficiently identifying and managing defective memory blocks, which can lead to errors due to non-uniform threshold voltage distributions of select transistors, affecting the reliability and performance of data storage operations.
Innovation Solution
A memory device and method that include peripheral circuits for performing erase operations and threshold voltage distribution scans on memory blocks, with control logic to determine whether a memory block is normal or defective based on the scan results, allowing for effective management and exclusion of defective blocks.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If threshold voltage distribution scan operation is performed on all memory blocks, then defective memory blocks can be identified accurately, but the operation time and complexity increase significantly
Solution Approach 1:
The patent performs a preliminary threshold voltage distribution scan operation on memory blocks before normal programming operations. This preliminary action identifies defective blocks in advance, allowing the system to exclude them from future operations. The scan operation monitors threshold voltage distributions of select transistors and determines whether memory blocks are normal or defective, preventing time-consuming re-scans and error corrections during normal operation.
Solution Approach 2:
The patent divides the memory device into multiple memory blocks and processes them individually through the scan operation. Each memory block is independently evaluated for defects, allowing the system to identify and exclude only the defective blocks while maintaining normal operation of healthy blocks. This segmentation approach reduces the overall impact on system performance compared to processing the entire memory device as a single unit.
2Reliability
If threshold voltage distribution monitoring is implemented, then data storage reliability is improved, but the device complexity and operational overhead increase
Solution Approach 1:
The patent implements a feedback mechanism where the control logic monitors threshold voltage distributions of select transistors during scan operations and uses this information to determine the status of memory blocks. The control logic receives feedback from the threshold voltage monitoring and adjusts its operations accordingly, excluding defective blocks from future programming and reading operations. This feedback-based approach improves reliability by ensuring that only healthy blocks are used, while the control logic complexity is managed through systematic decision-making processes.
3Reliability
If defective memory blocks are excluded from normal operations, then error prevention is enhanced, but the usable storage capacity decreases
Solution Approach 1:
The patent performs preliminary identification of defective memory blocks through threshold voltage distribution scanning before the memory device is put into normal use. By identifying and excluding defective blocks in advance, the system ensures that only reliable blocks are used for data storage, preventing future errors. The control logic maintains information about which blocks are defective and excludes them from future operations, ensuring high reliability while maximizing the use of healthy storage capacity.
Data Source
AI summary
Provided herein is a memory device and a method of operating the memory device. The memory device may include a one or more memory blocks, one or more peripheral circuits configured to perform an erase operation and a threshold voltage distribution scan operation on a selected memory block, and a control logic configured to control the one or more peripheral circuits, and determine the selected memory block to be a normal memory block or a defective memory block based on a result of the threshold voltage distribution scan operation.