Selective Error Correction in Nonvolatile Memory Blocks
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Solution Overview
Problem
Nonvolatile memory devices face reliability issues due to limited program or erase endurance, leading to decreased memory cell performance over time, which affects data retention and retrieval accuracy.
Innovation Solution
A memory system comprising a nonvolatile memory device with a memory cell array divided into first and second memory blocks, where a memory controller selectively performs error correction operations based on the state of these blocks to improve data reliability and storage efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If error correction operations are always performed on read data, then data reliability is improved, but power consumption and processing time increase
Solution Approach 1:
The patent applies partial action by selectively performing error correction operations only when necessary. The memory controller detects the state of memory blocks and determines whether error correction is needed based on program/erase cycle counts. This partial application of error correction maintains data reliability while reducing unnecessary power consumption and processing overhead.
2Reliability
If error correction operations are always performed, then data retrieval accuracy is improved, but processing speed decreases
Solution Approach 1:
The system performs error correction partially - only when the memory block state indicates potential errors. The memory controller monitors program/erase cycle counts and selectively applies error correction based on detected block states, thereby maintaining accuracy when needed while improving overall processing speed by skipping unnecessary corrections.
Solution Approach 2:
The error correction approach is made dynamic rather than static. The system adapts its error correction behavior based on real-time detection of memory block states. When blocks are in good condition, error correction is skipped; when blocks show signs of degradation, error correction is applied, creating a dynamic response that optimizes both speed and accuracy.
3Quantity of substance
If memory cells are used beyond their program/erase endurance, then storage capacity is maximized, but reliability decreases
Solution Approach 1:
The system takes preliminary action by monitoring the program/erase cycle counts of memory blocks before errors occur. The memory controller detects the state of memory blocks and identifies when they are approaching their endurance limits, allowing proactive management of data placement and error correction strategies to maintain reliability while utilizing available storage capacity.
Solution Approach 2:
The system implements feedback by continuously detecting the state of memory blocks based on program/erase cycle counts. This feedback information is used by the memory controller to make informed decisions about data placement, error correction application, and block management, thereby maintaining reliability even as storage capacity is maximized through extensive use of memory cells.
4Use of energy by moving object
If selective error correction is implemented based on memory block state, then power consumption is reduced, but system complexity increases
Solution Approach 1:
The memory system is segmented into multiple blocks with independent state tracking. The memory controller maintains separate program/erase cycle count information for different blocks, allowing selective error correction on a per-block basis. This segmentation enables fine-grained power optimization without requiring complex system-wide control logic.
Data Source
AI summary
A memory system comprises a nonvolatile memory device comprising a memory cell array comprising first and second memory blocks, and a memory controller configured to control the nonvolatile memory device to read data from the first memory block, selectively determine an error correction operation to be performed on the data after it is read from the first memory block based on a state of at least one of the first and second memory blocks, and then store the data in the second memory block.