Memory Block Family Combining for Voltage Shift Management
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Solution Overview
Problem
Existing memory sub-systems face increased bit error rates due to the temporal voltage shift caused by slow charge loss in memory cells, which current technologies either fail to adequately address or do so inefficiently.
Innovation Solution
The memory sub-system employs block family-based error avoidance strategies by tracking temporal voltage shifts and applying appropriate voltage offsets to base read levels, allowing for efficient read operations by grouping blocks into families based on programming time and temperature, and periodically calibrating and combining block families to reduce metadata overhead.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If block families are tracked and calibrated individually, then bit error rates are reduced, but metadata overhead and resource consumption increase
Solution Approach 1:
The patent combines multiple block families into a single block family when their voltage metrics are similar, reducing the number of separate calibrations needed. This merging approach maintains reliability by grouping blocks with comparable characteristics while reducing metadata overhead by consolidating calibration data.
Solution Approach 2:
The patent creates a unified block family structure that can serve multiple calibration groups, allowing a single calibration profile to be applied universally to all blocks within the combined family. This multi-functional approach reduces the need for separate calibration data structures for each individual block family.
2Measurement precision
If voltage offsets are applied to compensate for temporal voltage shift, then read accuracy improves, but energy consumption increases
Solution Approach 1:
The patent dynamically adjusts voltage offsets based on the age of blocks and their specific voltage metrics rather than applying uniform offsets to all blocks. This parameter-based approach maintains read accuracy by compensating for temporal voltage shift only where necessary, reducing overall energy consumption compared to universal offset application.
Solution Approach 2:
The patent applies voltage offset compensation selectively to only those blocks that require it based on their age and voltage characteristics, rather than applying compensation to all blocks uniformly. This partial action approach maintains necessary read accuracy while minimizing unnecessary energy expenditure on blocks that don't require compensation.
3Manufacturing precision
If periodic calibration is performed on all block families, then voltage accuracy is maintained, but time and computational resources are wasted
Solution Approach 1:
The patent implements periodic calibration only for block families that have aged beyond a certain threshold or show signs of voltage drift, rather than calibrating all block families at fixed intervals. This selective periodic action maintains voltage accuracy for blocks that need it while avoiding unnecessary calibration operations on stable blocks.
Solution Approach 2:
The patent enables the memory system to automatically identify which block families require calibration based on their age and voltage metrics, performing calibration only when necessary. This self-service approach maintains voltage accuracy by letting the system monitor and calibrate itself selectively, reducing time and computational resource waste compared to mandatory periodic calibration of all blocks.
Data Source
AI summary
An example memory sub-system includes a memory device and a processing device, operatively coupled to the memory device. The processing device is configured to identify a first block family comprising a first set of blocks, wherein the first block family comprises a plurality of blocks that have been programmed within at least one of a specified time window or a specified temperature window; identify a second block family comprising a second set of blocks; and responsive to a determining that a threshold criterion is satisfied, combine the first block family and the second block family by appending, to first block family metadata of the first block family, a record referencing the second set of blocks.