Memory Block Family Read Correction With Temperature-Based Offsets
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Solution Overview
Problem
Existing memory sub-systems fail to adequately address temporal voltage shift caused by slow charge loss, leading to increased bit error rates due to temperature variation and program erase cycles, without employing inefficient strategies.
Innovation Solution
Implementing a memory sub-system that tracks temporal voltage shift for grouped block families, applying appropriate voltage offsets based on temperature and time since programming to perform read operations, and periodically calibrating threshold voltage offsets for improved bit error rate.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If voltage offsets are applied to compensate for temporal voltage shift, then bit error rate is reduced, but device complexity increases due to temperature tracking and voltage offset management
Solution Approach 1:
The system performs preliminary calibration to establish voltage offset tables before normal operation. These pre-computed offset values are stored and applied during read operations, eliminating the need for complex real-time calculations and reducing operational complexity while maintaining reliability
Solution Approach 2:
The patent introduces an intermediary calibration mechanism that mediates between temperature variations and voltage offset requirements. The calibration process creates a mapping (intermediary table) between temperature ranges and appropriate voltage offsets, simplifying the control logic during normal operation
2Measurement precision
If block families are tracked with metadata for temperature and time, then read operation accuracy is improved, but processing and storage resources are consumed
Solution Approach 1:
The system applies partial tracking by monitoring only essential parameters (temperature and time since programming) rather than comprehensive voltage shift characteristics. This selective monitoring provides sufficient accuracy for read operations while minimizing processing overhead and resource consumption
Data Source
AI summary
A system includes a memory device and a processing device, operatively coupled to the memory device. In some embodiments, the processing device accesses a matrix of threshold voltage offset bins, where a first dimension of the matrix is temperature and a second dimension of the matrix is a temporal voltage shift (TVS) amount. The processing device measures a temperature value based on a reference temperature value for a block family. The processing device measures a TVS value of a voltage level within one or more memory cell of the block family. The processing device retrieves, from the matrix, a threshold voltage offset bin based on the reference temperature value and the TVS value and reads data from any page of the block family via application of a threshold voltage offset, specified by the threshold voltage offset bin, to a base read level voltage.