Memory Block Separation Structure Against Fluorine Gas Erosion

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Solution Overview

Problem

Existing semiconductor memory devices face issues with fluorine gas-induced erosion of oxide films between memory blocks, leading to potential short circuits and interference with adjacent blocks.

Innovation Solution

Incorporation of a first separation region made of a conductor covered with an insulating film to separate memory blocks, preventing fluorine gas erosion and maintaining structural integrity.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If memory blocks are separated using only oxide films, then the device structure remains simple, but fluorine gas erosion causes short circuits and interference between adjacent blocks

Engineering Contradiction:
Improveprevention of short circuits between memory blocksVSAvoidstructure of separation regions
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The separation region is constructed as a composite structure with two distinct layers: a lower oxide film layer and an upper insulating film layer. This composite material approach combines the benefits of both materials - the oxide film provides good electrical isolation properties while the upper insulating film (such as nitride film) provides resistance to fluorine gas erosion, thereby preventing short circuits between adjacent memory blocks without significantly complicating the device structure

Inventive Principle:
Principle #40Composite materials

Solution Approach 2:

The lower oxide film layer is formed first as a preliminary protective barrier before the upper insulating film layer is added. This preliminary action of creating the oxide film foundation provides initial electrical isolation, and then the upper insulating film is deposited to provide additional protection against fluorine gas erosion during subsequent manufacturing processes

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS20260032901A1Semiconductor memory device
Publication Date: 2026.01.29 KIOXIA CORP
  • US20260032901A1 patent drawing
  • US20260032901A1 patent drawing
  • US20260032901A1 patent drawing

AI summary

According to an embodiment, a semiconductor memory device includes a first conductive layer and second conductive layers arranged at intervals in a first direction above the first conductive layer. A semiconductor layer extends in the first direction in the second conductive layers to be in contact with the first conductive layer. A charge storage layer is between the semiconductor layer and the second conductive layers. A metal layer extends in the first direction and a second direction above the first conductive layer, and separates the second conductive layers. The device further includes an insulating layer. The insulating layer includes a portion between the metal layer and the first conductive layer and a portion between the metal layer and the second conductive layers.