Memory Block Grouping for Voltage Control Optimization
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Solution Overview
Problem
Semiconductor memory devices experience characteristic changes and operational inefficiencies due to the varying positions of memory blocks, leading to uneven program and read speeds, as well as increased disturb-fail bits, which affect overall performance.
Innovation Solution
The semiconductor memory device groups memory blocks based on their relative positions and determines specific driving voltages for each group, applying distinct program start bias, erasure start bias, program pass voltage, and read pass voltage to improve operational characteristics by minimizing the impact of block position on performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If memory blocks are operated with uniform driving voltages regardless of position, then device complexity is reduced, but operational efficiency deteriorates due to characteristic changes according to block position
Solution Approach 1:
The memory blocks are divided into multiple groups based on their physical positions within the memory cell array. Each group is assigned specific driving voltages tailored to its position characteristics, allowing differentiated control without requiring individual block-level voltage management. This segmentation approach resolves the contradiction by grouping blocks to reduce control complexity while maintaining position-aware optimization for operational efficiency.
Solution Approach 2:
Different driving voltages are applied to different groups of memory blocks according to their specific positional characteristics within the array. This local quality approach ensures that each group receives optimized voltage parameters suited to its location, improving operational efficiency while avoiding the need for completely individualized control of every block, thus balancing complexity and performance.
2Productivity
If position-specific driving voltages are applied to all memory blocks, then operational efficiency is improved, but device complexity increases
Solution Approach 1:
Memory blocks are segmented into multiple groups based on positional characteristics, with each group receiving tailored driving voltages. This segmentation enables position-specific optimization without requiring individual control of every block, thus improving operational efficiency while limiting voltage control complexity to the number of groups rather than the total number of blocks.
Solution Approach 2:
Driving voltage parameters are changed and optimized for each group based on its positional characteristics within the memory array. By adjusting voltage parameters at the group level rather than individual block level, the system achieves position-specific optimization for improved operational efficiency while maintaining manageable control complexity.
3Ease of operation
If memory blocks are operated without grouping, then ease of operation is maintained, but program time increases due to characteristic variations
Solution Approach 1:
Memory blocks are segmented into groups with similar positional characteristics, allowing standardized voltage parameters to be applied within each group. This segmentation enables optimized program times for different positions while maintaining ease of operation through group-level rather than individual-block control, reducing overall program time without significantly complicating operation.
Solution Approach 2:
Driving voltage parameters are changed and optimized for each group based on positional characteristics. This parameter optimization reduces program time variations caused by position-dependent effects while maintaining ease of operation through systematic group-based control rather than complex individual block management.
4Ease of operation
If uniform driving voltages are applied to all groups, then ease of operation is maintained, but disturb-fail bits increase due to position-dependent characteristics
Solution Approach 1:
Memory blocks are segmented into groups based on positional characteristics that influence disturb-fail behavior. Each group is assigned driving voltages optimized for its position, reducing disturb-fail bits while maintaining ease of operation through group-level voltage application rather than requiring complex individual block control.
Solution Approach 2:
Different driving voltage parameters are applied to different groups according to their specific positional characteristics within the memory array. This local quality approach targets position-dependent disturb-fail issues with customized voltages for each group, improving reliability while maintaining operational simplicity through systematic group-based control.
Data Source
AI summary
A semiconductor memory device includes a memory cell array and a control logic. The memory cell array includes a plurality of memory blocks. The control logic groups the memory blocks, determines driving voltages to be respectively applied to the groups, and applies each of the determined driving voltages to memory blocks included in a corresponding group to control the operation of the memory cell array.