Memory Block Priority Management for Flash Storage Lifespan

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Solution Overview

Problem

Conventional non-volatile memory management techniques lead to premature disablement of memory blocks due to error correction bits, resulting in shortened lifespan of storage apparatuses, as they do not effectively utilize memory blocks at the edge of being disabled and fail to manage their healthiness.

Innovation Solution

A storage apparatus with an interface unit, access control unit, and memory unit, where memory blocks are categorized into block tables with different priorities based on error correction bits, allowing data to be stored and retrieved while prioritizing blocks with fewer error correction bits, thereby extending the lifespan by managing their usage effectively.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If memory blocks are placed into the disabled block table when error correction bits exceed the predetermined value, then data reliability is improved, but the lifespan of the storage apparatus is shortened

Engineering Contradiction:
Improvedata reliabilityVSAvoidlifespan of storage apparatus
Core Design Contradiction:
ReliabilityVSDuration of action of stationary object

Solution Approach 1:

The patent divides the single disabled block table into multiple disabled block tables (first disabled block table, second disabled block table, etc.), each with different thresholds for error correction bits. This segmentation allows memory blocks to be transferred to different disabled tables based on their error level, extending their usability as second-chance blocks for other memory blocks that need rewriting, thereby extending the overall lifespan of the storage apparatus while maintaining data reliability.

Inventive Principle:
Principle #1Segmentation

2Ease of operation

If memory blocks at the edge of being disabled are always used for data accessing, then ease of operation is improved, but the lifespan of the storage apparatus is shortened

Engineering Contradiction:
Improveease of data accessingVSAvoidlifespan of storage apparatus
Core Design Contradiction:
Ease of operationVSDuration of action of stationary object

Solution Approach 1:

The patent implements a feedback mechanism where the management unit continuously monitors the error correction bit counts of memory blocks and dynamically adjusts their placement between normal and disabled block tables. Memory blocks that approach the error threshold are proactively transferred to disabled tables before they become unusable, preventing premature disablement and extending the operational lifespan while maintaining ease of data accessing through automatic management.

Inventive Principle:
Principle #23Feedback

3Duration of action of stationary object

If multiple disabled block tables with different thresholds are implemented, then the lifespan of the storage apparatus is extended, but device complexity increases

Engineering Contradiction:
Improvelifespan of storage apparatusVSAvoidcomplexity of block table management
Core Design Contradiction:
Duration of action of stationary objectVSDevice complexity

Solution Approach 1:

The patent employs a management unit that automatically performs the complex task of monitoring error correction bits, determining appropriate thresholds, and transferring memory blocks between normal and disabled block tables. This self-service approach handles the increased complexity of multiple disabled tables internally, presenting a simple interface to users while achieving extended lifespan through sophisticated block management.

Inventive Principle:
Principle #25Self-service

Data Source

PatentUS20120192033A1Storage apparatus, method for accessing data and for managing memory block
Publication Date: 2012.07.26 TRANSCEND INFORMATION
  • US20120192033A1 patent drawing
  • US20120192033A1 patent drawing
  • US20120192033A1 patent drawing

AI summary

A method for managing a memory block is provided. In this method, a plurality of block tables having different storing priorities is provided. In addition, the number of error correction bits in the memory block is checked. Thereby, in the present invention, data can be stored into the memory block in a block table according to the number of error correction bits in the memory block so that the sequence in which the memory block is used for storing data is determined.