Memory Block Data Migration for Read Disturbance Mitigation
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Solution Overview
Problem
The read operation in semiconductor memory systems experiences read disturbances due to slight programming caused by pass voltages, leading to increased Fail Bit Counts (FBCs) and reduced reliability, particularly in high-density memory cells like QLC, TLC, and MLC.
Innovation Solution
A memory controller moves data from a first block with high read disturbance to a second block with better read disturbance resistance, such as SLC, when the read count exceeds a threshold, mitigating threshold voltage offsets and reducing error bits.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If pass voltage is applied to unselected word lines during read operation, then read access speed is improved, but read disturbance increases causing threshold voltage offsets and increased fail bit counts
Solution Approach 1:
The patent applies preliminary action by performing read disturbance mitigation operations before they become critical problems. The controller proactively identifies blocks with high read disturbance accumulation and performs data migration or read refresh operations in advance, preventing threshold voltage offsets from reaching failure thresholds and ensuring reliable read operations continue without interruption.
Solution Approach 2:
The patent converts the harmful effect of read disturbance into a beneficial monitoring and management system. By tracking read counts and identifying blocks experiencing read disturbance, the system uses this information to trigger preventive actions such as data migration to more robust blocks or read refresh operations, turning the previously harmful read disturbance into an opportunity for proactive reliability management.
2Quantity of substance
If high-density memory cells (QLC, TLC, MLC) are used to increase storage capacity, then storage density is improved, but susceptibility to read disturbance increases leading to more error bits
Solution Approach 1:
The patent applies local quality by differentiating management strategies for different memory blocks based on their specific read disturbance characteristics. Instead of uniform management, the controller tracks read counts per block and identifies specific blocks experiencing high read disturbance, then applies targeted mitigation actions such as data migration or read refresh only to those affected blocks, preserving the benefits of high-density storage while locally addressing reliability issues.
Solution Approach 2:
The patent changes operational parameters dynamically based on read disturbance levels. When a block is identified as experiencing high read disturbance, the system adjusts parameters such as applying read refresh operations with modified voltage sequences or migrating data to blocks with better error resistance characteristics, thereby adapting the storage system's behavior to maintain reliability across varying storage capacity configurations.
3Adaptability or versatility
If read count of adjacent physical pages increases, then data access flexibility is improved, but threshold voltage offset in target physical page increases reducing read accuracy
Solution Approach 1:
The patent implements feedback by continuously monitoring read counts of physical pages and using this information to control subsequent read operations. When the read count of adjacent physical pages exceeds a threshold, the system receives feedback about the accumulating read disturbance and responds by applying read refresh operations or migrating data, thereby closing the loop between monitoring and mitigation to maintain read accuracy despite high access flexibility.
Solution Approach 2:
The patent applies preliminary anti-action by implementing read refresh operations that counteract the threshold voltage offsets caused by adjacent page reads before they accumulate to problematic levels. By periodically applying these corrective read operations or migrating data from high-risk blocks, the system proactively neutralizes the harmful effects of flexible data access patterns on read accuracy.
Data Source
AI summary
Examples of the present disclosure provide memory systems and methods of operating thereof, computer-readable storage mediums and electronic apparatuses. An example memory system includes: a memory including a plurality of blocks, wherein the block includes a plurality of physical pages; and a memory controller coupled with the memory and configured to: determine a sum of the numbers of read times of physical pages adjacent to a first target physical page in a first block among the plurality of blocks; and in response to the sum of the numbers of read times being greater than or equal to a first threshold, move data stored in the first target physical page to a second block among the plurality of blocks, wherein the second block is different from the first block.