Memory Block Screening for Cross-Temperature Read Errors

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Solution Overview

Problem

Semiconductor memory devices face cross-temperature read errors due to variations in threshold voltages when programmed at high temperatures and read at low temperatures, leading to uncorrectable read failures, especially as memory blocks age with increasing programming and erasing cycles.

Innovation Solution

A method to proactively check memory blocks for vulnerability to cross-temperature read errors by calculating the natural threshold voltage (nVt) width and comparing it to a threshold, allowing for retirement or transition to single-bit per memory cell operation if vulnerable, thereby preventing uncorrectable errors.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If memory cells are programmed at high temperature, then programming speed and efficiency are improved, but read errors occur when reading at low temperature due to threshold voltage shifts

Engineering Contradiction:
Improveprogramming speedVSAvoidread accuracy
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent applies preliminary action by performing a programming operation without verify before threshold voltage measurement to establish a natural threshold voltage distribution. This preliminary programming step creates the baseline nVt distribution that is then used to detect cross-temperature vulnerability, allowing the system to proactively identify blocks that will fail under temperature variation before actual data is stored

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent utilizes parameter changes by measuring threshold voltage at different temperature conditions and comparing the natural threshold voltage distribution width (nVt width) to detect vulnerability. The system changes the operating temperature parameter and monitors how the threshold voltage distribution shifts, identifying blocks where the nVt width exceeds a threshold, indicating susceptibility to cross-temperature read errors

Inventive Principle:
Principle #35Parameter changes

2Manufacturing precision

If threshold voltage measurement is performed with verify programming, then programming accuracy is improved, but the natural threshold voltage distribution cannot be obtained for vulnerability detection

Engineering Contradiction:
Improveprogramming accuracyVSAvoidnatural threshold voltage distribution
Core Design Contradiction:
Manufacturing precisionVSLoss of information

Solution Approach 1:

The patent applies the taking out principle by extracting the verification step from the programming operation. By performing programming without verify, the system isolates the natural threshold voltage distribution formation process from the accuracy-correcting verify process. This extraction allows measurement of the true nVt distribution that reflects inherent block characteristics rather than verify-corrected values, enabling accurate vulnerability detection

Inventive Principle:
Principle #2Taking out (Extraction)

3Reliability

If memory blocks are retired due to cross-temperature vulnerability, then data integrity is improved, but storage capacity is reduced

Engineering Contradiction:
Improvedata integrityVSAvoidstorage capacity
Core Design Contradiction:
ReliabilityVSQuantity of substance

Solution Approach 1:

The patent applies local quality by identifying and treating only the specific memory blocks that exhibit cross-temperature vulnerability through nVt width measurement, rather than retiring entire memory devices or all blocks. Each block is individually assessed, and only those with nVt width exceeding the threshold are marked as vulnerable. This localized approach preserves the majority of functional blocks while protecting data integrity in the affected blocks through targeted retirement or operational changes

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS20230420053A1Techniques for checking vulnerability to cross-temperature read errors in a memory device
Publication Date: 2023.12.28 SANDISK TECHNOLOGIES LLC
  • US20230420053A1 patent drawing
  • US20230420053A1 patent drawing
  • US20230420053A1 patent drawing

AI summary

The memory device includes a memory block with an array of memory cells. The memory device also includes control circuitry that is in communication with the memory cells. The control circuitry is configured to program a group of the memory cells in a programming operation that does not include verify to obtain a natural threshold voltage (nVt) distribution, calculate an nVt width of the nVt distribution, compare the nVt width to a threshold, and identify the memory block as being vulnerable to cross-temperature read errors in response to the nVt width exceeding the threshold.