Non-Volatile Memory Verification by Block Reliability
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Solution Overview
Problem
Existing memory sub-systems degrade in performance due to longer programming delays, higher power consumption, and increased error rates resulting from uniform write verification across all valid blocks without considering their varying reliability and health characteristics, especially in critical applications where high performance is required.
Innovation Solution
Implementing reliability-based data verification by designating subsets of non-volatile memory blocks with different reliability designations and configuring them in either a first verification mode (1P0V) without write verification or a second verification mode (1P1V) based on their reliability and health characteristics, such as PEC count, to optimize performance and reduce errors.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If uniform write verification is applied to all valid blocks, then data reliability is improved, but programming delays increase and performance deteriorates
Solution Approach 1:
The patent applies different verification modes to different subsets of memory blocks based on their reliability characteristics. High-reliability blocks use a first verification mode (faster, less stringent), while low-reliability blocks use a second verification mode (slower, more stringent). This local differentiation resolves the contradiction by tailoring verification intensity to actual block needs, improving overall programming speed without sacrificing data reliability.
2Reliability
If uniform write verification is applied to all valid blocks, then data reliability is improved, but power consumption increases
Solution Approach 1:
The patent implements energy-efficient verification by applying different verification modes to different block subsets. High-reliability blocks undergo lighter verification consuming less power, while low-reliability blocks receive thorough verification only when necessary. This resolves the contradiction by eliminating unnecessary power consumption from over-verification of reliable blocks while maintaining data reliability through targeted verification of unreliable blocks.
3Reliability
If uniform write verification is applied to all valid blocks, then data reliability is maintained, but error rates increase due to uniform treatment of varying block characteristics
Solution Approach 1:
The patent reduces error rates by matching verification intensity to actual block reliability characteristics. High-reliability blocks use a verification mode appropriate to their quality, avoiding unnecessary stress that could induce errors. Low-reliability blocks receive enhanced verification to catch and correct potential errors. This resolves the contradiction by optimizing verification for each block type, maintaining overall data reliability while reducing error induction from mismatched verification.
4Productivity
If write verification is performed on all blocks, then programming delays are reduced, but device complexity increases due to uniform verification logic
Solution Approach 1:
The patent segments the memory blocks into subsets based on reliability characteristics and assigns different verification modes to each segment. This segmentation allows the system to maintain relatively simple verification logic within each segment while achieving overall optimized performance. The segmentation approach resolves the contradiction by organizing complexity into manageable segments rather than requiring a single complex uniform verification system.
Data Source
AI summary
A method includes designating a first subset of non-volatile memory with a first reliability designation, designating a second subset of non-volatile memory blocks with a second reliability designation, configuring the first subset of non-volatile memory blocks and the second subset of non-volatile memory blocks in a first verification mode, writing data to first subset of non-volatile memory blocks and the second subset of non-volatile memory blocks in the absence of write verification.