Nonvolatile Memory Block Segmentation for Bad Region Isolation
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Solution Overview
Problem
Nonvolatile memory devices face challenges in managing storage capacity and memory integrity due to increases in storage capacity that do not align with existing memory management policies, leading to potential reductions in device lifetime from bad blocks.
Innovation Solution
A nonvolatile memory device is designed with a memory cell array where a first memory block is divided into a partial bad region and a partial normal region based on error information, allowing for distinct bias conditions to be applied during operations, thereby extending the device's lifetime without replacing the bad block with a reserved block.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a memory block is designated as a bad block due to errors, then the reliability of the memory device is compromised, but replacing the bad block with a reserved block reduces the available storage capacity
Solution Approach 1:
The patent divides a bad block into multiple sub-blocks based on error information, identifying which specific sub-blocks contain errors and which are still functional. This segmentation allows the memory device to utilize the error-free sub-blocks, thereby preserving storage capacity while maintaining reliability by isolating and managing only the defective portions.
Solution Approach 2:
The patent applies different management strategies to different regions within a bad block. By identifying specific sub-blocks with errors versus those without errors, the system applies localized quality assessment and management, treating functional sub-blocks differently from defective ones, thus maximizing usable storage while ensuring reliability.
2Duration of action of stationary object
If a memory block is designated as a bad block, then the device lifetime is reduced, but replacing it with a reserved block increases device complexity
Solution Approach 1:
The patent segments bad blocks into sub-blocks and maintains management information at the sub-block level rather than treating entire blocks as uniformly bad. This granular segmentation enables more precise tracking of functional versus defective regions, extending device lifetime by utilizing healthy sub-blocks while keeping management complexity manageable through structured organization.
Solution Approach 2:
The patent changes the management parameter from block-level designation to sub-block-level designation. By tracking error information and functional status at the sub-block level, the system can extend device lifetime through more flexible resource allocation while managing complexity through parameter refinement rather than system overhaul.
3Quantity of substance
If error information is used to divide a bad block into partial bad and partial normal regions, then the storage capacity is optimized, but the ease of operation decreases
Solution Approach 1:
The patent automatically segments bad blocks into partial bad and partial normal regions using error information, optimizing usable storage capacity. The segmentation process is handled automatically by the memory device, maintaining ease of operation from the user perspective while internally maximizing storage utilization through intelligent region division.
Solution Approach 2:
The memory device performs self-service by automatically analyzing error information, dividing bad blocks into functional and non-functional regions, and managing the allocation without requiring user intervention. This self-service approach optimizes storage capacity while preserving ease of operation, as users interact with the device normally without needing to understand or manage the internal segmentation.
Data Source
AI summary
A nonvolatile memory device includes a memory cell array and a control circuit. The memory cell array includes a plurality of memory blocks, each including a plurality memory cells coupled to word-lines respectively, and the word-lines are stacked vertically on a substrate. The control circuit divides a first memory block of the plurality of memory blocks into a partial bad region and a partial normal region based on error information of an uncorrectable error of the first memory block which is designated as a bad block. The control circuit performs a memory operation on the partial normal region by applying a first bias condition to the partial bad region and by applying a second bias condition to the partial normal region, based on a command and an address, and the first bias condition is different from the second bias condition.