Nonvolatile Memory Blocking Insulating Layer Charge Leakage

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Solution Overview

Problem

Current nonvolatile semiconductor memory devices face challenges in maintaining high reliability due to charge leakage between memory cells, which affects data retention and integration density.

Innovation Solution

The design incorporates a blocking insulating layer that is continuous between charge storage portions and gate electrode layers, suppressing charge movement between memory cells, and includes independent charge storage portions separated in the Z-direction, along with a multilayer blocking film structure to enhance insulative properties and prevent lateral charge de-trapping.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If memory cells are integrated three-dimensionally to increase bit density, then productivity and storage capacity improve, but charge leakage between memory cells increases and reliability deteriorates

Engineering Contradiction:

Improvebit densityVSAvoidcharge retention

Core Design Contradiction:

ProductivityVSReliability

Solution Approach 1:

The blocking insulating layer is divided into multiple segments including a first blocking insulating layer between charge storage portions and a second blocking insulating layer between the tunneling insulating layer and charge storage portions. This segmentation isolates charge storage portions from each other and from the tunneling insulating layer, preventing charge leakage while maintaining three-dimensional integration.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The blocking insulating layer acts as an intermediary barrier between the charge storage portions and the tunneling insulating layer/channel layer. This intermediate blocking structure prevents direct charge movement between memory cells while allowing the three-dimensional memory architecture to function properly.

Inventive Principle:

Principle #24Intermediary (Mediator)

2Reliability

If a continuous blocking insulating layer is introduced to suppress charge leakage, then reliability improves, but device complexity increases

Engineering Contradiction:

Improvecharge retentionVSAvoidinsulating layer structure

Core Design Contradiction:

ReliabilityVSDevice complexity

Solution Approach 1:

The blocking insulating layer is formed as a continuous structure that merges the first and second blocking insulating layers into a unified barrier system. This continuous blocking layer simplifies the overall device structure while effectively preventing charge leakage between memory cells and maintaining reliability.

Inventive Principle:

Principle #5Merging (Combining)

3Reliability

If charge storage portions are separated in the Z-direction to prevent charge de-trapping, then reliability improves, but manufacturing precision requirements increase

Engineering Contradiction:

Improvecharge retentionVSAvoidlayer alignment

Core Design Contradiction:

ReliabilityVSManufacturing precision

Solution Approach 1:

The blocking insulating layer is formed preliminarily between the charge storage portions and the tunneling insulating layer before final memory cell operation. This preliminary blocking structure ensures proper charge isolation is established during manufacturing, preventing charge de-trapping issues and reducing the need for post-manufacturing adjustments.

Inventive Principle:

Principle #10Preliminary action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration improves charge retention characteristics, allows for higher memory cell integration, and increases bit density while enabling low-power programming and erasing operations.

Implementation Method 1

a blocking insulating layer which is provided between the inter-layer insulating layer and the tunneling insulating layer, between the first gate electrode layer and the first charge storage portion, between the inter-layer insulating layer and the first charge storage portion, between the inter-layer insulating layer and the second charge storage portion, and between the second gate electrode layer and the second charge storage portion

Methodology Applied

Scientific EffectElectrical insulation: Electrical Resistance

Data Source

PatentUS10283646B2Nonvolatile semiconductor memory device and method for manufacturing the same

Publication Date: 2019.05.07 KIOXIA CORP

AI summary

According to one embodiment, a nonvolatile semiconductor memory device includes first and second gate electrode layers, an inter-layer insulating layer, a channel layer, a tunneling insulating layer, first and second charge storage portions, and a blocking insulating layer. The channel layer is separated from the first and second gate electrode layers, and the inter-layer insulating layer. The tunneling insulating layer is provided between the first gate electrode layer and the channel layer. The first charge storage portion is provided between the first gate electrode layer and the tunneling insulating layer. The second charge storage portion is provided the second gate electrode layer and the tunneling insulating layer. The blocking insulating layer is provided between the inter-layer insulating layer and the tunneling insulating layer, between the first gate electrode layer and the first charge storage portion, between the inter-layer insulating layer and the first charge storage portion.