Memory Bonding Structure With Auxiliary Conductive Patterns
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Solution Overview
Problem
Existing semiconductor memory devices face challenges in maintaining the stability of the bonding structure between the memory cell array and the peripheral circuit structure, which affects the overall reliability and manufacturing efficiency.
Innovation Solution
The semiconductor memory device incorporates a bonding structure that includes peripheral circuit side and cell array side auxiliary bonding conductive patterns, which are spaced apart from the primary bonding conductive patterns, and are connected through insulating layers, enhancing the stability by reducing the bonding area between insulating materials and metals, and simplifying the manufacturing process.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Strength
If the bonding structure uses large bonding area between insulating materials and metals, then the bonding strength is improved, but the manufacturing complexity and pattern density variations increase
Solution Approach 1:
The bonding structure is divided into multiple discrete bonding conductive patterns (first, second, third, and fourth bonding conductive patterns) arranged in a matrix configuration. This segmentation allows the total bonding area to be distributed across multiple smaller patterns, maintaining overall bonding strength while reducing the complexity of forming and aligning large continuous bonding regions. Each bonding conductive pattern can be independently formed and controlled during manufacturing.
2Stability of the object's composition
If the bonding structure uses multiple bonding conductive patterns, then the stability is improved, but the device complexity increases
Solution Approach 1:
Multiple bonding conductive patterns are merged into a unified matrix arrangement where first and second bonding conductive patterns are integrated with third and fourth bonding conductive patterns. This merging creates a cohesive bonding structure that provides multiple bonding interfaces between the insulating layers, enhancing stability through redundant bonding paths while presenting a relatively simple overall architecture that can be formed using standard semiconductor manufacturing processes.
Data Source
AI summary
The present disclosure provides a semiconductor memory device. The semiconductor memory device includes a peripheral circuit structure on a semiconductor substrate, a conductive line connected to the peripheral circuit structure, a peripheral circuit side bonding conductive pattern connected to the conductive line, a peripheral circuit side auxiliary bonding conductive pattern spaced apart from the peripheral circuit side bonding conductive pattern, a cell array side bonding conductive pattern contacting the peripheral circuit side bonding conductive pattern, a cell array side auxiliary bonding conductive pattern contacting the peripheral circuit side auxiliary bonding conductive pattern, and a memory cell array connected to the cell array side bonding conductive pattern.