3D Non-Volatile Memory Bonding Shield Structure for Coupling Reduction
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Solution Overview
Problem
As feature sizes of planar memory cells approach their limits, scaling becomes challenging and costly, and electrical interference between memory arrays and peripheral devices in 3D memory architectures affects device operation.
Innovation Solution
A non-volatile memory device with a shielding structure electrically connected to a voltage source is introduced between the memory array and circuit structure to reduce coupling effects, improving operational and electrical performance by surrounding the bonding structure between the two.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If a 3D memory architecture is used to increase memory density, then memory density is improved, but electrical interference between memory array and peripheral devices increases
Solution Approach 1:
A shielding structure is introduced as an intermediary element between the memory array and peripheral devices. This shielding structure includes a first shielding layer disposed between the memory array and peripheral devices, and a second shielding layer disposed between the memory array and bonding pads, effectively mediating and reducing electrical interference while preserving the high-density 3D architecture benefits
2Quantity of substance
If planar memory cells are scaled to smaller sizes to increase density, then memory density is improved, but manufacturing complexity and cost increase
Solution Approach 1:
The patent transitions from planar (2D) memory cell scaling to three-dimensional (3D) memory architecture. By stacking memory cells vertically across multiple substrates and utilizing vertical interconnections, the design achieves higher density without further reducing lateral feature sizes, thereby avoiding the associated manufacturing complexity and cost increases
3Reliability
If shielding structure is added to reduce coupling effects, then electrical performance is improved, but device complexity increases
Solution Approach 1:
The shielding structure is segmented into multiple functional layers: a first shielding layer positioned between the memory array and peripheral devices, and a second shielding layer positioned between the memory array and bonding pads. This segmentation allows each layer to address specific interference paths independently, improving electrical performance while managing structural complexity through modular design
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The shielding structure enhances the operational and electrical performance of the non-volatile memory device by mitigating coupling effects, thereby improving device efficiency and reducing manufacturing complexity.
Implementation Method 1
The shielding structure is electrically connected to a voltage source for reducing coupling effects between the bonding structure and the circuit structure
Data Source
AI summary
A memory device includes a first semiconductor structure and a second semiconductor structure. The memory device further includes a bonding structure between the first semiconductor structure and the second semiconductor structure, the bonding structure comprising a first bonding pattern and a second bonding pattern in contact with each other, the first semiconductor structure being electrically connected with the second semiconductor structure through the bonding structure. The memory device further includes a shielding structure between the first semiconductor structure and the second semiconductor structure and surrounding the bonding structure, the shielding structure comprising a third bonding pattern and a fourth bonding pattern in contact with each other, the shielding structure being electrically connected with a biased voltage.