Memory Device Boost Voltage Modulation for Faster Corrective Reads
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Solution Overview
Problem
Memory devices experience reliability issues due to cell-to-cell interference and VT distribution widening, leading to increased bit errors and RWB degradation, which are exacerbated by the high number of reads required in conventional corrective read operations.
Innovation Solution
Implementing boost voltage modulated corrective read (BMCR) that uses boost regulators to modulate read levels on a strobe-by-strobe basis, reducing the number of reads and minimizing latency and read disturb effects.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional corrective read operations are performed to address cell-to-cell interference and VT distribution widening, then memory reliability is improved, but the high number of reads required increases read latency and causes read disturb effects
Solution Approach 1:
The patent modulates the boost voltage parameter dynamically during corrective read operations. By adjusting the boost voltage level based on the read stage and target cell characteristics, the system achieves reliable detection with fewer read operations, thereby reducing read latency while maintaining memory reliability
Solution Approach 2:
The patent performs a limited number of corrective read operations rather than exhaustive reads. By using boost voltage modulation to enhance signal detection capability, the system achieves sufficient reliability with partial action (fewer reads), reducing read disturb effects and latency
2Reliability
If conventional corrective read operations are performed to address cell-to-cell interference, then bit error rate is reduced, but the number of read operations increases causing read disturb effects
Solution Approach 1:
The patent changes the boost voltage parameter to optimize detection sensitivity. This allows achieving low bit error rates with fewer read operations, thereby reducing read disturb effects that occur when memory cells are repeatedly accessed during corrective reads
3Reliability
If wordline voltage modulated corrective read is used, then corrective read functionality is achieved, but latency is high compared to boost voltage modulated approach
Solution Approach 1:
The patent replaces wordline voltage modulation with boost voltage modulation. This substitution enables faster voltage establishment and more efficient signal detection, achieving the same corrective read functionality with significantly reduced latency (fourfold improvement as stated in the patent
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
BMCR significantly improves memory device performance and reliability by reducing read latency and mitigating read disturb, achieving a fourfold improvement in latency compared to wordline voltage modulated corrective read.
Implementation Method 1
uses boost regulators to modulate read levels on a strobe-by-strobe basis
Data Source
AI summary
A memory device can include a memory array and control logic, operatively coupled to the memory array, to perform operations including identifying a target cell of the memory array and assigning the target cell to a state information bin. The target cell is associated with a read operation, and the state information bin defines a boost voltage level offset.