Semiconductor Memory Boosting Circuit for Write Speed

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Current semiconductor memory devices face challenges in speeding up the write operation due to inefficiencies in voltage generation and distribution during program and verify operations, leading to prolonged write times.

Innovation Solution

The semiconductor memory device incorporates a boosting circuit that generates multiple voltages, including a high voltage for program operations and an intermediate voltage for verify operations, with the ability to supply these voltages simultaneously to accelerate the write process by increasing current to non-selected word lines, thereby reducing the time required for program verify operations.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If a single voltage generation circuit is used for both program and verify operations, then device complexity is reduced, but write operation speed is insufficient due to inability to supply voltages simultaneously

Engineering Contradiction:
Improvewrite operation speedVSAvoidvoltage generation circuit complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The voltage generation circuit is segmented into a first boosting circuit for generating a first voltage (e.g., 0V or ground potential) and a second boosting circuit for generating a second voltage (e.g., read verify potential). These separate circuits can operate independently and simultaneously, allowing the program operation (using first voltage) and verify operation (using second voltage) to proceed in parallel, thereby improving write operation speed without requiring a single complex multi-functional circuit.

Inventive Principle:
Principle #1Segmentation

2Loss of time

If voltage is supplied sequentially to selected and non-selected word lines, then device complexity is minimized, but write time is prolonged

Engineering Contradiction:
Improvewrite timeVSAvoidvoltage supply control complexity
Core Design Contradiction:
Loss of timeVSDevice complexity

Solution Approach 1:

The non-selected word lines are precharged to a specific potential (first voltage or ground potential) before the program operation begins. This preliminary voltage application to non-selected word lines prepares the circuit state in advance, allowing the program operation to proceed without waiting for sequential voltage setup. As a result, the overall write time is reduced while the control complexity remains manageable through systematic precharging sequences.

Inventive Principle:
Principle #10Preliminary action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration significantly shortens the write time by efficiently generating and distributing voltages, enhancing the speed of the write operation in semiconductor memory devices.

Implementation Method 1

a first boosting circuit including a first output terminal and configured to generate a first voltage, a second voltage, and a third voltage lower than the second voltage at the first output terminal

Methodology Applied
Scientific EffectVoltage boosting:

Data Source

PatentUS11735277B2Semiconductor memory device includind boosting circuit that changes generated voltages in write operation
Publication Date: 2023.08.22 KIOXIA CORP
  • US11735277B2 patent drawing
  • US11735277B2 patent drawing
  • US11735277B2 patent drawing

AI summary

According to one embodiment, a semiconductor memory device includes a first memory cell and a first boosting circuit. The first boosting circuit generates a first voltage, a second voltage, and a third voltage lower than the second voltage at a first output terminal. The first, second and third voltages is used for a write operation. The write operation includes a first program operation and a first verify operation executed after the first program operation. The first boosting circuit generates the first voltage at the first output terminal during the first program operation, generates the third voltage at the first output terminal at end of the first program operation, generates the second voltage at the first output terminal during the first verify operation, and then generates the first voltage to the first output terminal during the first verify operation.