Memory Device Boot-Up Data Transfer for Parallel Testing

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Solution Overview

Problem

Conventional memory devices face challenges in performing timely repair operations due to long read latency in nonvolatile memory, which prevents simultaneous testing of memory banks and configuration circuits during burn-in tests, leading to extended test times.

Innovation Solution

An integrated circuit and memory device configuration that includes nonvolatile memory, registers, and a transmission unit, allowing data from the nonvolatile memory to be output and stored during boot-up operations, with a no-update mode that maintains stored data without changes, enabling independent testing of memory banks and configuration circuits.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If data is transmitted from nonvolatile memory to registers during boot-up operation, then repair data and configuration data are available for memory operation, but test time is extended because simultaneous testing of memory banks and configuration circuits cannot be performed

Engineering Contradiction:

Improvedata availability for memory operationVSAvoidtest time

Core Design Contradiction:

ReliabilityVSLoss of time

Solution Approach 1:

The patent segments the data transmission process by introducing a transmission completion signal that divides the boot-up operation into distinct phases. This allows the testing system to independently test memory banks during data transmission and configuration circuits after transmission completion, enabling parallel testing that reduces overall test time while ensuring data integrity.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The patent implements preliminary action by pre-enabling the transmission completion signal before the actual data transmission begins. This allows the testing system to prepare test sequences in advance and execute memory bank tests during the data transmission phase, rather than waiting for transmission to complete before initiating any tests.

Inventive Principle:

Principle #10Preliminary action

2Ease of manufacture

If laser fuses are used for storing repair information, then data can be programmed in wafer state, but the area cannot be reduced due to pitch limits and programming cannot be performed after package mounting

Engineering Contradiction:

Improvewafer state programming capabilityVSAvoidfuse circuit area

Core Design Contradiction:

Ease of manufactureVSArea of stationary object

Solution Approach 1:

The patent replaces the mechanical laser fuse cutting process with an electrical field-based nonvolatile memory programming mechanism. This substitution eliminates the need for physical laser beams and associated pitch constraints, allowing for much smaller storage elements while maintaining the ability to program repair information in wafer state and after package mounting.

Inventive Principle:

Principle #28Mechanics substitution (Replace mechanical system)

3Adaptability or versatility

If nonvolatile memory is used to store repair information, then programming flexibility is improved, but read latency increases preventing timely repair operations

Engineering Contradiction:

Improveprogramming flexibilityVSAvoidread latency

Core Design Contradiction:

Adaptability or versatilityVSSpeed

Solution Approach 1:

The patent applies preliminary action by transferring all required repair data and configuration data from nonvolatile memory to registers during the boot-up operation before normal memory operations begin. This pre-loading ensures that when repair operations are needed, the data is already available in fast registers, eliminating read latency issues during actual repair operations.

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The patent introduces registers as an intermediary between nonvolatile memory and the repair operation logic. The nonvolatile memory serves as the persistent storage with high adaptability, while the registers provide fast access for timely operations. This two-tier storage architecture mediates between the conflicting requirements of programming flexibility and read speed.

Inventive Principle:

Principle #24Intermediary (Mediator)

Data Source

PatentUS9934875B2Integrated circuit and memory device performing boot-up operation

Publication Date: 2018.04.03 SK HYNIX INC

AI summary

An integrated circuit may include nonvolatile memory suitable for outputting stored data during the boot-up operation, one or more registers suitable for receiving the data output by the nonvolatile memory and storing the received data when the boot-up operation is performed, and one or more internal circuits suitable for operating using the data stored in the one or more registers. In no-update mode, although the boot-up operation is performed, a data update from the nonvolatile memory to the registers may not be performed.