Memory Device Boot-Up Read Patterns for Power-Up Error Reduction
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Solution Overview
Problem
Memory devices experience high error rates during power-up due to transitions from transient to stable states, leading to costly and time-consuming read error handling operations, which can cause host system timeouts.
Innovation Solution
Implement a boot-up read pattern data structure to proactively perform dummy reads based on previous power cycle patterns, transitioning memory cells from stable to transient states before actual host reads, thereby reducing read error handling operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If read error handling operations are performed during power-up to ensure data accuracy, then reliability is improved, but loss of time increases due to costly and time-consuming operations causing host system timeouts
Solution Approach 1:
The patent performs dummy read operations during the power-up sequence before actual host reads to proactively transition memory cells from stable states to transient states. This preliminary action prepares the memory device for upcoming read operations, ensuring data accuracy is maintained while reducing the need for costly read error handling operations during normal operation.
Solution Approach 2:
The patent changes the operational state of memory cells by performing dummy reads that transition cells from stable states to transient states. This parameter change in the memory cell states optimizes the readiness of memory cells for subsequent read operations, improving both reliability and reducing time loss during power-up and initial operations.
2Productivity
If dummy reads are performed during power-up to transition memory cells to transient states, then productivity is improved by reducing read error handling operations, but use of energy increases due to additional read operations
Solution Approach 1:
The patent performs dummy read operations during the power-up sequence to proactively prepare memory cells for upcoming host reads. By completing this preparation during the already-necessary power-up period, the patent improves subsequent read operation efficiency without adding significant energy consumption to normal operational phases.
Solution Approach 2:
The patent rushes through the memory cell state transition process by performing dummy reads during the critical power-up window. This approach consolidates the energy consumption into a brief initial period, improving overall productivity by eliminating the need for slower, more energy-intensive read error handling operations during normal operation.
Data Source
AI summary
A boot-up read pattern data structure is maintained. Each entry of the boot-up read pattern data structure comprises a boot-up read pattern associated with a respective power cycle event and a dummy boot-up read pattern flag. The dummy boot-up read pattern flag indicates that the boot-up read pattern has been consecutively used during boot-up. Storing, in a new entry of the boot-up read pattern data structure, a current boot-up read pattern associated with a respective power cycle event for each power cycle event. The current boot-up read pattern with a previous boot-up read pattern associated with a latest entry of the boot-up pattern data structure is compared. A dummy boot-up read pattern flag of the new entry is updated responsive to the comparing the current boot-up read pattern and the previous boot-up read pattern.