Memory Bridge in Processor Socket for Multi-Processor Systems

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Solution Overview

Problem

In multi-processor computer systems, the existing memory accessing architecture creates bottlenecks due to limited bandwidth and inefficiency when processors share memory, leading to wasted resources if a CPU fails or is removed, as the associated memories become unused.

Innovation Solution

A memory bridge is configured in a processor socket to electrically connect a processor bus and a memory bus, allowing a processor to access unused memory and I/O controllers without requiring an additional processor, thereby enabling efficient communication and utilization of resources without architectural changes.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of operation

If a north bridge architecture is used to control memory accessing, then memory access control is centralized, but memory accessing speed is limited due to bandwidth sharing and control processes

Engineering Contradiction:

Improvememory access controlVSAvoidmemory accessing speed

Core Design Contradiction:

Ease of operationVSSpeed

Solution Approach 1:

The patent divides the memory control function into multiple independent memory controllers, each dedicated to a specific processor. This segmentation eliminates the bandwidth sharing bottleneck of the centralized north bridge architecture, allowing each processor to access memory independently without control conflicts or bandwidth contention.

Inventive Principle:

Principle #1Segmentation

2Speed

If dedicated memory is assigned to each processor, then memory accessing speed is improved, but system flexibility is reduced when processors are removed or fail

Engineering Contradiction:

Improvememory accessing speedVSAvoidsystem flexibility

Core Design Contradiction:

SpeedVSAdaptability or versatility

Solution Approach 1:

The patent implements a universal memory controller that can serve multiple processors through a shared memory bus. This multi-functional design allows any available processor to access any available memory, providing system flexibility when processors are removed or fail while maintaining high access speeds through dedicated controller architecture.

Inventive Principle:

Principle #6Universality (Multi-functionality)

3Productivity

If additional processors are configured to utilize unused memory, then memory utilization is improved, but device complexity increases

Engineering Contradiction:

Improvememory utilizationVSAvoidprocessor configuration

Core Design Contradiction:

ProductivityVSDevice complexity

Solution Approach 1:

The patent enables the system to automatically detect and utilize unused memory resources through the memory controller's intelligent arbitration mechanism. The system self-adjusts memory allocation based on processor availability without requiring manual configuration or additional processors, maintaining simplicity while improving memory utilization efficiency.

Inventive Principle:

Principle #25Self-service

Data Source

PatentUS7512731B2Computer system and memory bridge for processor socket thereof

Publication Date: 2009.03.31 MITAC INT CORP

AI summary

A multi-processor computer system includes a memory bridge configured in a processor socket on a motherboard. The memory bridge module electrically connects a processor bus and a memory bus that connect to the processor socket. Thus, an adjacent processor is capable of accessing an unused memory by way of the processor bus, the memory bridge and the memory bus.