3D Memory Word-Line Bridge Layout for Voltage Control

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Solution Overview

Problem

Existing semiconductor storage devices with three-dimensional memory cell arrays face challenges in achieving high reliability while maintaining voltage controllability of word lines.

Innovation Solution

The semiconductor storage device is designed with a specific configuration that includes multiple conductive layers and semiconductor pillars, along with insulator columns, to form memory cells. This configuration includes a connection region with varying diameters of insulator columns to optimize electrical resistance and voltage control.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the bridge area is widened to reduce resistance, then voltage controllability is improved, but the device area increases and manufacturing complexity increases

Engineering Contradiction:
Improvevoltage controllabilityVSAvoidbridge area
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The insulator columns in the bridge area are designed with a smaller diameter than those in the step area, creating local variation in insulator dimensions. This local quality change reduces the resistance of conductive layers in the bridge area without requiring an overall increase in bridge area, thus maintaining voltage controllability while avoiding device area expansion.

Inventive Principle:
Principle #3Local quality

2Productivity

If the bridge area is widened to reduce resistance, then operational speed is improved, but manufacturing precision requirements increase

Engineering Contradiction:
Improveoperational speedVSAvoidinsulator column diameter control
Core Design Contradiction:
ProductivityVSManufacturing precision

Solution Approach 1:

Instead of uniformly increasing the bridge area, the invention locally modifies only the insulator column diameter in the bridge area to be smaller than in the step area. This targeted local change achieves resistance reduction for faster operation while confining the precision requirement to a localized region, making it more manageable during manufacturing.

Inventive Principle:
Principle #3Local quality

3Reliability

If insulator columns in bridge area have smaller diameter, then electrical resistance decreases, but void generation in silicon oxide films increases

Engineering Contradiction:
Improveelectrical resistanceVSAvoidvoid generation
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The insulator columns in the bridge area are designed with a smaller diameter than those in the step area, creating local variation in insulator dimensions. This local quality change reduces the resistance of conductive layers in the bridge area without requiring an overall increase in bridge area, thus maintaining voltage controllability while avoiding device area expansion.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS12328874B2Semiconductor storage device
Publication Date: 2025.06.10 KIOXIA CORP
  • US12328874B2 patent drawing
  • US12328874B2 patent drawing
  • US12328874B2 patent drawing

AI summary

A device includes a first region including first semiconductor pillars extending through first conductive layers; a second region including second semiconductor pillars extending through second conductive layers; and a third region disposed between the first region and the second region and including insulator columns extending through third conductive layers. The third region includes a fourth region and a fifth region. In the fourth region, one third conductive layer electrically connects one first conductive layer and one second conductive layer to each other, and in the fifth region, one third conductive layer is connected to a contact plug. A first diameter of a first subset of the insulator columns provided in the fourth region is smaller than a second diameter of a second subset of the insulator columns provided in the fifth region.