Memory Controller-Independent Mirroring via Buffer Segmentation
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Current memory mirroring in information handling systems (IHS) is costly and inefficient due to its reliance on memory controllers, which reduces system memory capacity and fails to effectively mirror data from all memory locations, especially those hidden from controllers like buffered DIMMs and TSV DIMMs.
Innovation Solution
Implementing memory controller-independent memory mirroring through a memory buffer that manages mirroring associations between memory segments, allowing data to be written and read independently of the memory controller, and using a scoreboard to alternate reads between primary and mirrored segments for error detection and correction.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If memory mirroring is enabled across all memory locations, then error detection and correction capability is improved, but system memory capacity is reduced by half
Solution Approach 1:
The patent divides memory into segments with different mirroring configurations. Instead of applying uniform mirroring across all memory locations, it segments memory into regions where mirroring is applied only where needed (e.g., critical system memory regions), while non-critical regions can operate without mirroring, thus preserving capacity while maintaining reliability where required.
Solution Approach 2:
The patent implements local quality by applying mirroring selectively to specific memory locations rather than uniformly across all memory. This allows critical memory regions to have full mirroring for error protection while non-critical regions maintain full capacity without mirroring overhead, optimizing the balance between reliability and capacity.
2Reliability
If memory mirroring is controlled by memory controllers, then mirroring associations can be established, but hidden memory locations (buffered DIMMs, TSV DIMMs) cannot be included in mirroring
Solution Approach 1:
The patent extracts the mirroring control function from the memory controller and relocates it to the memory management unit (MMU) or system firmware. This extraction allows the mirroring logic to access and manage all memory locations including hidden ones (buffered DIMMs, TSV DIMMs) that are invisible to the memory controller, thereby expanding mirroring coverage beyond controller limitations.
Solution Approach 2:
The patent introduces an intermediary layer (MMU or firmware) between the CPU and memory that handles mirroring operations. This intermediary can translate logical memory addresses to physical addresses and apply mirroring policies regardless of whether the underlying memory locations are visible to the memory controller, thus enabling comprehensive mirroring coverage.
3Reliability
If traditional memory controller-based mirroring is used, then mirroring can be implemented, but it increases cost and reduces efficiency
Solution Approach 1:
The patent implements dynamic mirroring where the mirroring configuration can be adjusted based on system needs, memory type, and workload characteristics. This dynamic approach allows the system to optimize memory utilization by applying mirroring only when and where necessary, rather than statically enabling it across all memory locations, thus improving overall productivity while maintaining required reliability.
Data Source
AI summary
A method of memory controller-independent memory mirroring includes providing a mirroring association between a first memory segment and a second memory segment that is independent of a memory controller. A memory buffer receives data from the memory controller that is directed to a first memory location in the first memory segment. The memory buffer writes the data, independent of the memory controller, to both the first memory segment and the second memory segment according to the mirroring association. The memory buffer receives a plurality of read commands from the memory controller that are directed to the first memory location in the first memory segment and, in response, reads data from an alternating one of the first memory segment and the second memory segment and stores both first data from the first memory segment and second data from the second memory segment.