Memory Device Edge and Middle Buffer Circuit Signal Transmission
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Solution Overview
Problem
Semiconductor memory devices face challenges in increasing capacity while maintaining high-speed signal transmission without increasing the device area, particularly due to the need for additional circuitry for signal transmission which can lead to increased power consumption and delay times.
Innovation Solution
The implementation of a memory device with an edge buffer circuit and a middle buffer circuit connected through signal lines above the memory cell array, transmitting differential small-swing signals to enable high-speed signal transmission without the need for repeaters or inverters, thus minimizing area expansion and power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a circuit for signal transmission is added to the memory cell array, then signal transmission capability is improved, but the area of the memory device increases
Solution Approach 1:
The signal transmission path is segmented into two separate buffer circuits positioned at opposite sides of the memory cell array. The edge buffer circuit receives external signals through pads at one side, while the middle buffer circuit is placed at the opposite side to receive transmitted signals. This segmentation allows signal transmission without adding circuits within the memory cell array, thus maintaining compact area while improving signal transmission capability.
Solution Approach 2:
The patent introduces signal lines as intermediary transmission channels that extend from the edge buffer circuit through the memory cell array to the middle buffer circuit. These signal lines act as mediators that carry differential small-swing signals across the memory device without requiring additional active circuits within the memory cell array, thereby enabling signal transmission while preserving area efficiency.
2Reliability
If conventional signal transmission circuits are used, then signal transmission is achieved, but power consumption increases
Solution Approach 1:
The patent changes the signal transmission parameter by using differential small-swing signals instead of conventional full-swing signals. The edge buffer circuit drives the signal lines with differential signals that have smaller voltage swings, which reduces the dynamic power consumption while maintaining signal integrity across the memory device. This parameter change enables efficient signal transmission with lower power consumption.
3Reliability
If conventional signal transmission circuits are used, then signal transmission is achieved, but delay time increases
Solution Approach 1:
By segmenting the signal transmission function into separate edge and middle buffer circuits positioned at opposite sides of the memory cell array, the patent eliminates the need for signal to traverse through multiple intermediate circuits within the memory cell array. This segmentation reduces the total propagation delay and enables faster signal transmission across the memory device.
Data Source
AI summary
A memory device includes a memory cell array that a plurality of memory cells, an edge buffer circuit that is placed in a first region adjacent to one side of the memory cell array and receives an external signal from the outside through a pad, and a middle buffer circuit that is placed in a second region adjacent to an opposite side of the memory cell array and receives a differential small-swing signal corresponding to the external signal from the edge buffer circuit through first and second signal lines above the memory cell array. The edge buffer circuit drives the first and second signal lines based on the external signal such that the differential small-swing signal is transmitted to the middle buffer circuit.