Memory I/O Buffer Voltage Switching for Multi-Level Compatibility

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Solution Overview

Problem

Existing memory devices can only support a single level of voltage signal, requiring multiple devices for different power inputs, increasing production complexity, inventory, and cost.

Innovation Solution

A memory device with a voltage detecting circuit and input-output buffer circuit that adjusts its operating voltage range based on detected signal levels, allowing it to support multiple voltage levels.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If multiple memory devices are designed to support different voltage signal levels, then voltage compatibility is improved, but device complexity and manufacturing complexity increase

Engineering Contradiction:
Improvevoltage compatibilityVSAvoidmanufacturing complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The memory device incorporates a voltage detecting circuit and an input-output buffer circuit capable of operating in multiple voltage modes (first voltage mode and second voltage mode). The buffer circuit can function as a first buffer for a first voltage level or as a second buffer for a second voltage level based on detection results, allowing a single device to replace multiple specialized devices and thereby reducing manufacturing complexity while maintaining voltage compatibility

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The input-output buffer circuit's operating characteristics are dynamically adjusted based on the detected voltage signal level. The circuit can switch between different operating modes (first operating mode and second operating mode) with different voltage ranges, enabling the device to adapt to different voltage environments without requiring separate fixed-design devices for each voltage level

Inventive Principle:
Principle #15Dynamics

2Adaptability or versatility

If multiple memory devices are designed to support different voltage signal levels, then voltage compatibility is improved, but inventory and cost control become more difficult

Engineering Contradiction:
Improvevoltage compatibilityVSAvoidinventory and cost control
Core Design Contradiction:
Adaptability or versatilityVSEase of manufacture

Solution Approach 1:

By designing a single memory device that can function across multiple voltage levels through its voltage detecting circuit and multi-mode buffer circuit, manufacturers need to produce and stock only one type of device instead of multiple voltage-specific variants. This universal design simplifies inventory management and cost control while maintaining the ability to support different voltage signal levels

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Ease of manufacture

If a single memory device supports multiple voltage levels, then manufacturing flexibility is improved, but circuit complexity increases

Engineering Contradiction:
Improvemanufacturing flexibilityVSAvoidcircuit complexity
Core Design Contradiction:
Ease of manufactureVSDevice complexity

Solution Approach 1:

The input-output buffer circuit is segmented into functional portions that can operate in different voltage modes. The voltage detecting circuit separately detects voltage levels, and the buffer circuit responds by activating appropriate operating modes. This segmentation allows the circuit to handle multiple voltage levels through structured functional divisions rather than requiring completely separate circuits for each voltage level, thus improving manufacturing flexibility while controlling circuit complexity

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS20250384905A1Memory device and operating method thereof
Publication Date: 2025.12.18 WINBOND ELECTRONICS CORP
  • US20250384905A1 patent drawing
  • US20250384905A1 patent drawing
  • US20250384905A1 patent drawing

AI summary

A memory device including a voltage detecting circuit and an input-output buffer circuit is provided. The voltage detecting circuit receives a voltage signal and detects a level of the voltage signal. The input-output buffer circuit is disposed in the memory device, and coupled to the voltage detecting circuit. Based on the detecting result of the voltage detecting circuit, an operating voltage range of the input-output buffer circuit is set. The operating voltage range of the input-output buffer circuit corresponds to at least two different operating voltage ranges.