Memory Device Bulk Initialization with Hamming Code Patterns
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Solution Overview
Problem
Existing memory devices, such as SRAM, struggle to initialize all memory cells simultaneously, especially in ECC memory or areas holding important data, as they can only initialize data to 0 or 1 and cannot perform bulk initialization in these contexts.
Innovation Solution
A memory device that initializes all memory cell data by specifying initialization data or partially masking the initialization area, allowing for bulk initialization with arbitrary data patterns, including Hamming codes, and restricting initialization in both word and bit directions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If all memory cells are initialized simultaneously using conventional methods, then initialization speed is improved, but initialization flexibility and applicability to ECC memory are worsened
Solution Approach 1:
The memory array is divided into multiple banks, and within each bank, word lines are segmented into multiple groups. The initialization control circuit can selectively activate different word line groups in different banks independently, allowing simultaneous initialization of multiple regions while maintaining flexibility to initialize only specific areas as needed.
Solution Approach 2:
The initialization control circuit dynamically configures the initialization operation by receiving control signals that specify which banks and word line groups to initialize. This dynamic configuration allows the system to adapt between full-array initialization for speed and partial-array initialization for flexibility, depending on the application requirements.
2Device complexity
If initialization data is fixed to 0 or 1 only, then initialization circuit complexity is reduced, but initialization precision and applicability to ECC memory are worsened
Solution Approach 1:
Initialization data is prepared in advance in a register before being transferred to the memory cells. This preliminary preparation allows complex data patterns including Hamming codes to be configured without adding complexity to the core initialization circuitry, as the data preparation occurs in a separate staging area.
Solution Approach 2:
A register acts as an intermediary between the data input interface and the memory cells. This intermediary component buffers and prepares the initialization data, allowing complex data patterns to be specified without directly complicating the initialization control circuit, while still enabling precise control over the data written to memory.
Data Source
AI summary
Providing a memory device that initializes memory cell data in a batch by specifying initialization data, or a memory device that initializes memory cell data in a batch by partially masking the initialization area. A memory device is provided that includes a control circuit that receives an initialization mode signal transmitted from an initialization control circuit and generates an internal clock and a write control signal, an IO (Input/Output) input circuit that applies a Low level to the True side or Bar side of a bit line according to initialization data transmitted from the initialization control circuit, and a selection circuit that simultaneously selects multiple word lines and multiple bit lines, and writes the initialization data simultaneously into a memory cell connected to the selected word lines and bit lines.