Integrated Data Control Circuit for Memory Bus Inversion and Masking

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Solution Overview

Problem

Current semiconductor technologies face challenges in efficiently controlling data bus inversion and data masking operations in semiconductor memory apparatuses, which affect data transmission and storage efficiency.

Innovation Solution

A semiconductor apparatus and system incorporating an integrated data control circuit that generates data control flag signals to manage data bus inversion and masking operations, utilizing an input/output circuit block to invert or mask data based on these signals, and a data line repeater block to selectively output data to memory bank regions.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If separate control circuits are used for data bus inversion and data masking operations, then control functionality is achieved, but circuit area increases and design efficiency decreases

Engineering Contradiction:

Improvedesign efficiencyVSAvoidcircuit structure

Core Design Contradiction:

Ease of manufactureVSDevice complexity

Solution Approach 1:

The patent combines the data bus inversion control circuit and data masking control circuit into a single integrated data control circuit. This unified circuit receives operation control signals and data, generates appropriate control flag signals, and routes them to either the input/output circuit block or data line repeater block based on the operation type, thereby reducing overall circuit complexity and improving design efficiency while maintaining full control functionality

Inventive Principle:

Principle #5Merging (Combining)

Solution Approach 2:

The integrated data control circuit is designed to perform multiple functions: it controls both data bus inversion operations for read data and data masking operations for write data within a single circuit structure. The circuit selectively activates different control pathways based on the operation mode, making the circuit universal and eliminating the need for separate dedicated control circuits

Inventive Principle:

Principle #6Universality (Multi-functionality)

2Productivity

If integrated data control circuit is used, then design efficiency improves and circuit area is secured, but control logic complexity increases

Engineering Contradiction:

Improvedesign efficiencyVSAvoidcontrol logic

Core Design Contradiction:

ProductivityVSDevice complexity

Solution Approach 1:

The integrated data control circuit is segmented into distinct functional modules: an operation control signal reception unit, a control flag signal generation unit, and selective control signal routing units. The circuit divides control operations into separate pathways for read data (inversion control) and write data (masking control), with each segment handling specific tasks. This modular segmentation manages control logic complexity while maintaining integration benefits

Inventive Principle:

Principle #1Segmentation

Data Source

PatentUS10599338B2Data control circuit, and semiconductor memory apparatus and semiconductor system including the same

Publication Date: 2020.03.24 SK HYNIX INC

AI summary

A semiconductor memory apparatus may include a data control circuit, an input/output circuit block, and a data line repeater block. The data control circuit may generate a data control flag signal based on an operation control signal and data. The input/output circuit block may perform a data bus inversion operation for the data, based on the data control flag signal. The data line repeater block may perform a data masking operation for the data based on the data control flag signal.