3D Memory Device C-Axis Oxide Semiconductor Alignment
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
In semiconductor memory devices, the interface between semiconductor and insulator materials can form trap centers, leading to shifts in threshold voltage and charge leakage, affecting the reliability and storage capacity of three-dimensional memory cell arrays.
Innovation Solution
A manufacturing method involving a specific stacking structure with oxide semiconductors, where the semiconductor is aligned with the c-axis normal to the side surface of conductors, reducing the number of manufacturing steps and enhancing the reliability and storage capacity of memory devices.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If a plurality of memory elements are stacked and connected in series to form a three-dimensional memory cell array, then storage capacity per unit area is increased, but trap centers are formed at the interface between semiconductor and insulator, leading to threshold voltage shifts and charge leakage
Solution Approach 1:
An oxide semiconductor layer is introduced as an intermediary between the semiconductor and insulator materials. This intermediate layer prevents direct contact between the semiconductor and insulator, thereby eliminating trap centers at the interface while maintaining the stacked memory structure for increased storage capacity.
Solution Approach 2:
The patent employs composite material structures including oxide semiconductors combined with other semiconductor materials and insulators. This composite approach creates a multi-layered interface structure that reduces trap center formation while preserving the three-dimensional stacked architecture for high-density storage.
2Ease of operation
If charge is extracted and injected through the insulator to write data to memory cells, then data writing is achieved, but trap centers shift the threshold voltage of the transistor
Solution Approach 1:
The oxide semiconductor acts as a mediator that allows charge extraction and injection for data writing while preventing the formation of trap centers that would otherwise cause threshold voltage shifts. This enables data writing operations without compromising transistor stability.
3Ease of operation
If the inside of the insulator and the interface where semiconductor and insulator contact deteriorate due to charge extraction and injection, then data writing is achieved, but leakage and loss of charge held in the charge accumulation layer occurs
Solution Approach 1:
The oxide semiconductor intermediate layer protects the insulator interior and semiconductor-insulator interface from deterioration during charge extraction and injection. This preservation of material integrity prevents charge leakage and maintains charge retention capability in the accumulation layer.
Data Source
AI summary
A highly reliable memory device is provided. In a method for manufacturing a memory device that includes a first insulator, a first conductor including a first opening over the first insulator, a second insulator including a second opening over the first conductor, a second conductor including a third opening over the second insulator, a third insulator over the second conductor, and a semiconductor provided in the first opening to the third opening, the first insulator is formed, the first conductor is formed over the first insulator, the second insulator is formed over the first conductor, a fourth insulator is formed over the second insulator, the third insulator is formed over the fourth insulator, the third opening is formed in the fourth insulator, the second opening is formed in the second insulator, the first opening is formed in the first conductor, the semiconductor is formed in the first opening to the third opening, the fourth insulator is removed, and the second conductor is formed between the second insulator and the third insulator.