Memory Controller Cache Quantization for Encrypted Partial Writes
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Solution Overview
Problem
Existing data encryption methods require inefficient read-modify-write operations when data sizes are not divisible by the fixed block size of the encryption scheme, leading to excessive memory access and power consumption.
Innovation Solution
A cache-based approach is used to cache partial writes, reducing the need for read-modify-write operations by caching partial data and encrypting it before writing to memory, thereby optimizing data access and reducing power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If read-modify-write operations are used for data smaller than fixed block size, then data can be stored in encrypted memory, but the number of memory accesses increases and power consumption increases
Solution Approach 1:
The cache stores previously read plaintext data blocks before encryption operations are needed. When a write operation requires data smaller than the fixed block size, the cache already contains the necessary plaintext data, eliminating the need for preliminary read operations from encrypted memory. This preliminary caching action resolves the contradiction by preparing data in advance, reducing memory access time while maintaining data security through encrypted storage.
Solution Approach 2:
The cache acts as an intermediary between the encrypted memory and the encryption/decryption circuitry. Instead of directly reading from and writing to encrypted memory for every small data operation, the cache mediates by storing plaintext data blocks that can be quickly accessed and modified. This intermediary layer reduces the number of slow encrypted memory accesses while maintaining security, as the cache holds plaintext only temporarily during processing.
2Reliability
If read-modify-write operations are used for data smaller than fixed block size, then data can be stored in encrypted memory, but power consumption increases
Solution Approach 1:
The cache pre-stores plaintext data blocks that will be needed for encryption operations. This preliminary action eliminates repeated read-modify-write cycles to encrypted memory, significantly reducing power consumption. By having data ready in the cache before encryption is needed, the system avoids multiple high-power memory access operations while maintaining secure encrypted storage.
Solution Approach 2:
The cache serves as a low-power intermediary that reduces frequent accesses to high-power encrypted memory. By mediating between encrypted storage and processing units, the cache minimizes the number of expensive memory operations, thereby reducing overall power consumption while maintaining data security through encrypted persistent storage.
3Reliability
If fixed block size encryption is used, then data can be encrypted and stored, but inefficient read-modify-write operations are required for data smaller than block size
Solution Approach 1:
The cache pre-loads and stores complete plaintext data blocks that correspond to encrypted data in memory. When write operations need to modify only part of a block, the cache already contains the full plaintext block, allowing efficient modification without requiring read-modify-write operations on encrypted data. This preliminary caching improves encryption efficiency while maintaining security.
Solution Approach 2:
The cache mediates between the fixed block size encryption requirements and variable size data operations. By providing pre-fetched plaintext blocks, the cache enables efficient processing of data smaller than the encryption block size without compromising security. This intermediary layer allows the system to maintain fixed block encryption while achieving variable size operation efficiency.
Data Source
AI summary
Some examples described herein provide for an encrypted data quantization apparatus and method, for example a memory controller to quantize encrypted data using a cache. One or more embodiments includes obtaining a first set of plaintext data bits to be stored in a memory device using an encryption scheme. A memory address for encrypted data bits to be stored in the memory device is identified for a first subset of plaintext data bits. A second set of plaintext data bits associated with the memory address is obtained from a cache, if present. The second set of plaintext data bits are modified according to the first set of plaintext data bits to be stored in the memory device to generate a third set of plaintext data bits that are then encoded according to the encryption scheme for storage in the memory device.


