Memory Cache Pinning for Wear-Leveling Speed Bottlenecks

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Solution Overview

Problem

Non-volatile memory systems face challenges in maintaining processing speed while avoiding increased costs due to the finite resistance to read and write operations, which lead to memory cell deterioration and potential data loss.

Innovation Solution

A memory system with a non-volatile memory and a controller that tracks data addresses subject to wear leveling processes, using a buffer to perform pinning processes and prevent overwriting of frequently accessed data, thereby improving processing speed and reducing cost by managing wear-out information.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If buffer capacity is increased to store more frequently accessed data, then processing speed is improved, but device cost increases

Engineering Contradiction:
Improveprocessing speedVSAvoidbuffer capacity
Core Design Contradiction:
SpeedVSQuantity of substance

Solution Approach 1:

The system performs wear leveling processes in advance and tracks the history of these processes. By identifying data that has undergone wear leveling, the system proactively pins this data in the buffer before it would otherwise be evicted, preventing future read delays caused by buffer misses and avoiding the need to continuously expand buffer capacity.

Inventive Principle:
Principle #10Preliminary action

2Reliability

If wear leveling processes are performed frequently to prevent memory cell deterioration, then reliability is improved, but productivity deteriorates due to increased read operations

Engineering Contradiction:
Improvememory cell durabilityVSAvoiddata processing throughput
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The system maintains a wear leveling history that records which data has undergone wear leveling processes. This feedback mechanism allows the system to identify and pin frequently wear-leveled data, ensuring these cells receive adequate wear leveling attention while reducing unnecessary wear leveling operations on other data, thereby balancing reliability maintenance with productivity preservation.

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS12474857B2Memory system
Publication Date: 2025.11.18 KIOXIA CORP
  • US12474857B2 patent drawing
  • US12474857B2 patent drawing
  • US12474857B2 patent drawing

AI summary

A memory system includes a non-volatile memory and a controller including a memory having a lower access latency than the non-volatile memory. The controller is configured to track addresses of data stored in the non-volatile memory that were subject to prior wear leveling processes, in a buffer configured in the memory of the controller, perform a current wear leveling process on data stored in the non-volatile memory, and determine whether an address of the data subject to the current wear leveling process is stored in the buffer, and perform a pinning process to disable overwrite of data stored in the memory of the controller and corresponding to the address.