Dual-Bank Memory Cache Remapping During Power-Down Transitions
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Solution Overview
Problem
Existing semiconductor memory devices face issues with accuracy, reliability, performance degradation due to cache misses, blackout time during power mode transitions, and increased response times, particularly in systems requiring ultra-high speed operations.
Innovation Solution
Implementing a memory device with a dual bank structure and a cache controller that uses hash functions to dynamically manage power distribution among banks, allowing for efficient remapping of cachelines and reducing blackout time by optimizing power usage based on performance requirements.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If power is suspended to a bank group to save energy, then power consumption is reduced, but cache access accuracy deteriorates due to mapping errors
Solution Approach 1:
The patent implements dynamic hash function selection based on power mode states. The cache controller switches between first hash functions (when banks are powered) and second hash functions (when banks are powered down), making the hashing mechanism adaptive to power conditions. This resolves the contradiction by dynamically adjusting the mapping strategy according to the power state of bank groups.
Solution Approach 2:
The patent performs preliminary forwarding of cachelines to alternative bank groups before power suspension occurs. When a power control signal indicates upcoming power suspension, the cache controller proactively identifies cachelines that would map to the soon-to-be-powered-down banks and forwards them to alternative powered-on banks. This preliminary action prevents mapping errors and maintains cache access accuracy throughout the power transition.
2Use of energy by moving object
If power mode transitions are implemented to optimize performance, then energy efficiency improves, but blackout time increases during transitions
Solution Approach 1:
The patent performs preliminary forwarding of cachelines to alternative bank groups before power suspension occurs. By identifying and migrating cachelines that would map to powered-down banks in advance, the system minimizes the time required for cache operations during power mode transitions, thereby reducing blackout time while maintaining energy efficiency.
Solution Approach 2:
The patent ensures continuous cache accessibility during power transitions by maintaining active mapping paths to powered-on bank groups. The hash function switching mechanism guarantees that cache accesses continue to function without interruption or significant delay, preserving the continuity of useful operations throughout the power mode transition process.
3Measurement precision
If hash functions are changed to remap cachelines during power suspension, then cache accuracy improves, but response time increases
Solution Approach 1:
The patent performs preliminary forwarding of cachlines to alternative bank groups before power suspension occurs. By completing the remapping operation in advance, the system avoids the need for hash function changes during active cache operations, thereby maintaining fast response times while ensuring accurate cache mapping throughout the power transition.
Solution Approach 2:
The patent introduces an intermediary forwarding mechanism that bridges the gap between different hash function mappings. Instead of directly changing hash functions and risking access errors, the system uses a forwarding path as an intermediary to redirect cachlines to the correct powered-on banks, maintaining both accuracy and fast response times.
4Speed
If dual bank structure is used to enable parallel operations, then processing speed improves, but device complexity increases
Solution Approach 1:
The patent divides the cache into multiple independent bank groups, each capable of parallel operations. This segmentation enables simultaneous cache accesses to different banks, improving processing speed. The modular bank structure allows independent power management of each group, optimizing energy efficiency without significantly increasing overall system complexity.
Solution Approach 2:
The patent implements a universal hash function switching mechanism that serves multiple functions: it enables accurate cache mapping during power transitions, supports parallel bank operations, and facilitates proactive cacheline forwarding. This multi-functional approach reduces the need for separate control circuits for each function, thereby limiting the increase in device complexity despite the dual bank structure.
Data Source
AI summary
The present disclosure relates to an electronic device, a memory device, and an operating method of the memory device. An example memory device includes a first bank, a second bank, and a cache controller. The cache controller is configured to set a hash function based on a power control signal that comprises instructions to stop supplying power to the first bank, and to map the first address and the second bank based on the hash function and a first transaction provided by a master after the power control signal is input.