Memory Capacitor Soft Etching for DRAM Reliability
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The reduction in size of memory cells in DRAM devices leads to lower storage capability and increased refresh frequency, as conventional methods for increasing capacitor area, such as crown-type stacked capacitors, are limited by complex fabrication processes and result in reduced storage capacitance and access speed.
Innovation Solution
A method involving a soft etching process using a fluoride, nitrogen, and hydrogen containing compound to form a memory capacitor, which enhances the accuracy of the bottom electrode layer formation, allowing for a more reliable capacitor structure by creating recesses and preventing sharp angles that could cause corona discharge.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Shape
If conventional photolithography is used to form crown-type stacked capacitors, then sidewall structures can be formed, but the fabrication process becomes complex and the desired depth and configuration cannot be achieved
Solution Approach 1:
A sacrificial layer is formed in advance and filled into the openings before the bottom electrode layer is deposited. This preliminary action enables subsequent soft etching to precisely remove the bottom electrode from sidewalls while maintaining vertical profiles, achieving the desired sidewall structure without complex fabrication processes
Solution Approach 2:
The sacrificial layer acts as an intermediary element that facilitates the formation of the bottom electrode layer with proper sidewall structure. It provides a template for conformal deposition and enables selective removal through soft etching, achieving precise sidewall configuration without direct complex photolithography patterning
2Area of stationary object
If the area of each memory cell is reduced, then high integrated density can be achieved, but the storage capability of the memory cell decreases
Solution Approach 1:
The invention transitions from planar capacitor structures to three-dimensional crown-type stacked capacitors with vertical sidewalls. This dimensional change increases the electrode surface area and storage capability within the same footprint, allowing high integrated density to be achieved without sacrificing storage capability
3Manufacturing precision
If a soft etching process is used to remove bottom electrode from sidewalls, then manufacturing precision is improved, but additional process steps are required
Solution Approach 1:
The soft etching process uses specific chemical parameters (fluoride-containing compound, nitrogen and hydrogen containing compound, oxygen containing compound) to achieve selective removal of the bottom electrode layer from sidewalls. This parameter-controlled approach enables precise manufacturing by targeting specific material removal while preserving other structures, making the additional process step efficient and controllable
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The method improves the reliability and accuracy of forming memory capacitors, enabling higher storage capability and faster access speeds in DRAM devices by avoiding etching residue and maintaining structural integrity.
Implementation Method 1
A soft etching process is performed for removing the bottom electrode on the patterned supporting layer and partials of sidewalls of the openings, wherein said soft etching process comprises using a fluoride containing compound, a nitrogen and hydrogen containing compound and an oxygen containing compound
Data Source
AI summary
The present invention relates to a method of forming a memory capacitor. A substrate is provided with a plurality of storage node contacts. A patterned supporting structure is formed on the substrate, following by forming a bottom electrode conformally on surface of plural openings in the patterned supporting structure, thereby contacting the storage node contacts. A sacrificial layer is formed in the opening. A soft etching process is performed to remove the bottom electrode on top and partial sidewall of the patterned supporting structure, wherein the soft etching process includes using a fluoride containing compound, a nitrogen and hydrogen containing compound and an oxygen containing compound. The sacrificial layer is completely removed away. A capacitor dielectric layer and a top electrode are formed on the bottom electrode layer.


