Memory Card Cross-Link Interface Reduces Bus Contention
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Solution Overview
Problem
Current non-volatile memory technologies, such as NAND flash memory, face limitations in endurance, data retention, and high initial access latency, which can lead to system latencies and bus congestion when multiple devices are used in arrays, necessitating alternative interface technologies for efficient data management and error correction.
Innovation Solution
A mass storage system with multiple memory cards that communicate directly through a dedicated cross-link connector, allowing for direct command, address, and data transmission between cards, reducing system bus contention and enabling local error checking and correction algorithms, such as Reed Solomon or LDPC, to distribute parity data without relying on the system bus.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If multiple memory cards communicate through the system bus, then data transfer is possible, but bus contention and congestion occur leading to increased latency
Solution Approach 1:
The patent divides the communication path into two segments: system bus for host communication and a dedicated cross-link interface for inter-card communication. This segmentation allows memory cards to communicate directly with each other without contending for system bus resources, thereby reducing bus contention and system latency while maintaining data transfer speed.
Solution Approach 2:
The cross-link interface acts as an intermediary communication channel between memory cards. Instead of memory cards competing for access to the system bus, the cross-link interface provides a dedicated mediation path for data exchange, eliminating bus contention and reducing latency.
2Reliability
If error correction data is transferred through the system bus, then data integrity can be maintained, but system bus bandwidth is consumed
Solution Approach 1:
The patent extracts the error correction communication function from the system bus and places it on the dedicated cross-link interface. Error correction data is now transferred through the cross-link interface rather than consuming system bus bandwidth, while still maintaining data integrity through the same error correction mechanisms.
Solution Approach 2:
The cross-link interface serves as an intermediary for error correction data transfer, separating this function from the system bus. This allows error correction operations to proceed without competing for system bus bandwidth, thereby preserving data integrity while conserving bus resources.
3Ease of manufacture
If NAND flash memory is used for its low cost per bit, then manufacturing cost is reduced, but endurance and data retention are limited
Solution Approach 1:
The patent combines multiple memory cards into a unified storage system with shared error correction resources. By merging the error correction functionality across multiple cards through the cross-link interface, the system achieves enhanced reliability and endurance that compensates for the limitations of individual NAND flash memory devices, while maintaining the cost advantage of using NAND flash.
Solution Approach 2:
The patent implements cross-card error correction where memory cards can read and verify error correction data stored on other cards through the cross-link interface. This feedback mechanism allows the system to detect and correct errors that may develop over time, thereby extending effective endurance and improving data retention reliability while still using cost-effective NAND flash memory.
Data Source
AI summary
A mass storage system comprising multiple memory cards, each with non-volatile memory components, a system bus interface for communicating with a system bus of a host system, and at least one ancillary interface. The ancillary interface is configured for direct communication of commands, addresses and data between the memory cards via a cross-link connector without accessing the system bus interface.