Memory Card Dual Data Bus Sector Transfer Optimization
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Solution Overview
Problem
Conventional memory cards face limitations in reducing the program time of NAND flash memory, which restricts overall data storage efficiency, despite advancements in data transfer times from the host to the memory card.
Innovation Solution
The memory card employs a dual data bus system within the memory controller, allowing direct data transfer to the NAND flash memory for sectors other than the first sector in a page, bypassing the buffer memory, and using a buffer memory for sector data transfer when accessing the first sector, thereby optimizing data storage speed.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If data is transferred via buffer memory for all sectors, then data transfer control is simplified, but data storage time increases
Solution Approach 1:
The patent segments the data transfer process into two distinct paths: direct transfer for sectors other than the first sector, and buffer memory transfer for the first sector. This segmentation allows optimization of each path according to its specific requirements, reducing overall data storage time while maintaining manageable control complexity through sector-based differentiation.
Solution Approach 2:
The memory controller dynamically selects the appropriate data transfer path based on the sector address. For the first sector, it uses the buffer memory path, while for subsequent sectors, it enables direct transfer. This dynamic adaptation optimizes data storage performance by choosing the most efficient path for each specific transfer scenario.
2Productivity
If direct data transfer is used for all sectors, then data storage speed increases, but memory controller complexity increases
Solution Approach 1:
The patent applies different transfer characteristics to different sectors locally. The first sector uses buffer memory transfer, while other sectors use direct transfer. This local differentiation optimizes data storage speed for most sectors without uniformly increasing controller complexity across all transfer scenarios.
Solution Approach 2:
Instead of implementing direct transfer for all sectors (excessive action), the patent applies direct transfer only to sectors other than the first one (partial action). This partial application achieves speed optimization where most needed while avoiding unnecessary controller complexity for the first sector transfer.
3Loss of time
If program time of NAND flash memory is reduced, then overall data storage time decreases, but fundamental changes in NAND flash memory are required
Solution Approach 1:
The buffer memory acts as an intermediary between the host and the NAND flash memory. By using the buffer memory for the first sector transfer, the system can optimize the overall data storage process without requiring fundamental changes to the NAND flash memory itself, maintaining ease of manufacture while reducing total storage time.
Data Source
AI summary
A memory card, connected to a host, includes a NAND flash memory and a memory controller. The NAND flash memory includes multiple pages, and each page includes multiple sectors. The memory controller receives sector data and a corresponding sector address from the host. The memory controller enables the sector data to be transferred to the NAND flash memory over a first data bus, via a buffer memory, when the sector address is an address for accessing a first sector in a selected page. The memory controller enables the sector data to be transferred to the NAND flash memory over a second data bus, bypassing the buffer memory, when the sector address is an address for accessing a sector other than the first sector in the selected page.