Memory Card Interface Controller Parallel Buffer Segmentation
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Solution Overview
Problem
Memory cards with security functions face delays in receiving commands and data due to long communication times between the microcomputer chip and the controller chip, especially when using low-speed communication interfaces or handling large-capacity data, which can lead to significant waiting times.
Innovation Solution
The implementation of a memory card with an interface controller that utilizes multiple buffers to allow parallel processing of commands, enabling the interface controller to receive and process new commands and data without waiting for the completion of communication processes between the data processor and the interface controller, even when using different chips for the microcomputer and controller.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If a single buffer is used for storing data related to both microcomputer chip data process and flash memory chip access, then device complexity is reduced, but communication speed and productivity deteriorate due to waiting time
Solution Approach 1:
The patent divides the single buffer into two separate buffers: a first buffer for storing data related to the microcomputer chip data process, and a second buffer for storing data related to flash memory chip access. This segmentation allows independent operation of each buffer, eliminating the waiting time that occurred when one buffer had to complete its data transfer before accepting new data. The interface controller can now manage data flows to different destinations simultaneously without interference.
2Productivity
If data process by microcomputer chip is permitted during communication, then productivity is improved, but device complexity increases due to parallel processing requirements
Solution Approach 1:
The interface controller is segmented into distinct functional units: a first buffer for microcomputer chip data, a second buffer for flash memory access, and a controller that manages both independently. This segmentation enables the controller to permit data processes during communication by managing the two buffers in parallel, achieving improved productivity without excessive complexity.
Solution Approach 2:
The patent introduces an interface controller as an intermediary between the microcomputer chip and the flash memory chip. This intermediary manages the data flow coordination, allowing the microcomputer chip to perform data processes while the interface controller simultaneously handles flash memory access through separate buffers. The intermediary resolves the conflict between simultaneous operations and sequential processing.
3Ease of manufacture
If communication speed between microcomputer chip and controller chip is low, then ease of manufacture is improved by using standard interfaces, but waiting time increases significantly
Solution Approach 1:
The patent segments the data transfer path into two independent channels using separate buffers. Even when the communication interface between the microcomputer chip and controller chip operates at low speed according to standard interfaces like ISO 7816, the segmented buffer structure allows the controller to accept new commands and data without waiting for the completion of previous transfers. This eliminates the cumulative waiting time that would otherwise occur with sequential processing.
Data Source
AI summary
A memory card has external interface terminals, an interface controller connected to each of the terminals, a rewritable nonvolatile memory connected to the interface controller, and a data processor connected to the interface controller. The interface controller can perform an operation based on another command supplied from the outside in parallel with the operations of transferring a command for a data process supplied from the outside to the data processor and operating it. The interface controller has plural buffers and, after completely inputting the command for a data process from an outside to a first buffer of the plural buffers, allows data related to the other command supplied from the outside to be inputted to a second buffer of the plural buffers. The memory card can receive a command data and data to be processed subsequently from the outside without the need of waiting for the completion of the communication process between the data processor and the interface controller.