Memory Card Test System With Orthogonal Circuit Boards

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Current memory card testing methods require a computer host for each card, leading to high costs and low efficiency, as only a single card can be tested at a time, occupying a large area.

Innovation Solution

A test system utilizing a first circuit board and a second circuit board with multiple test circuits, eliminating the need for a computer host, allowing simultaneous testing of multiple memory cards.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a computer host is used for testing each memory card individually, then testing reliability is ensured, but device area increases and test efficiency decreases

Engineering Contradiction:
Improvetesting reliabilityVSAvoidtest efficiency
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent merges multiple testing functions into a single integrated test device. Multiple memory cards can be tested simultaneously using a shared computer host and unified testing system, eliminating the need for separate computer hosts for each card. This combining approach maintains testing reliability while significantly improving test efficiency and reducing device area.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The test device is designed with universal functionality to handle multiple memory cards simultaneously. The system includes multiple test circuits that can independently test different memory cards, allowing a single device to perform multiple testing operations parallelly, thus improving productivity without sacrificing reliability.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Measurement precision

If a computer host is used for testing each memory card individually, then testing accuracy is maintained, but device cost increases

Engineering Contradiction:
Improvetesting accuracyVSAvoiddevice cost
Core Design Contradiction:
Measurement precisionVSEase of manufacture

Solution Approach 1:

The patent combines multiple testing functions into a single integrated device, reducing the total number of computer hosts and testing equipment needed. This merging approach maintains testing accuracy through unified test circuits while significantly reducing device cost and manufacturing complexity.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The system uses multiple test circuits that can be replicated on a single circuit board, allowing parallel testing of multiple memory cards. This copying approach enables simultaneous testing without requiring separate computer hosts for each card, thereby reducing cost while maintaining accuracy.

Inventive Principle:
Principle #26Copying

3Ease of operation

If a single memory card is tested at a time, then testing simplicity is maintained, but test efficiency decreases

Engineering Contradiction:
Improvetesting simplicityVSAvoidtest efficiency
Core Design Contradiction:
Ease of operationVSProductivity

Solution Approach 1:

The patent segments the testing system into multiple independent test circuits that can simultaneously test different memory cards. Each test circuit operates independently, maintaining simplicity in individual testing operations while enabling parallel processing to improve overall test efficiency. The segmentation allows multiple cards to be tested at once without complicating individual test procedures.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The system transitions from sequential testing of single cards to parallel testing of multiple cards by adding a temporal and spatial dimension to the testing process. Multiple test circuits operate simultaneously on different cards, converting a single-dimensional sequential operation into a multi-dimensional parallel operation, thus improving efficiency without sacrificing operational simplicity.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Data Source

PatentEP3889961B1Test system for memory card
Publication Date: 2025.09.10 HUAWEI TECH CO LTD
  • EP3889961B1 patent drawingFigure 1
  • EP3889961B1 patent drawingFigure 2
  • EP3889961B1 patent drawingFigure 3

AI summary

A test system (100) for a memory card is disclosed. The test system (100) includes: a first circuit board (110), where one side of the first circuit board (110) is provided with a plurality of contact groups (111) spaced apart from each other along a row direction, and the other side of the first circuit board (110) is provided with slots (112) disposed along the row direction; and a second circuit board (120), where the second circuit board (120) is provided with a test circuit (122), and the second circuit board (120) is inserted into the slot (112) along a direction perpendicular to the first circuit board (110), and provides a test signal to the contact groups (111). In this system, a computer host is not required to test a memory card, and test efficiency of the memory card is improved.