Memory Card Program Update via CPU Reset and Volatile Memory Segmentation
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Solution Overview
Problem
Conventional memory card updating methods face challenges such as increased manufacturing costs and volatile memory requirements when updating the driving program, as well as reliance on additional software and circuitry, especially when updating application programs stored in read-only memory.
Innovation Solution
A memory card design that includes a CPU, volatile memory, and nonvolatile memory, with a host interface capable of receiving command signals to reset and release the CPU, allowing the update application program to be stored in volatile memory and the update program to be stored in nonvolatile memory, thereby enabling efficient program updates without additional costs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If the driving program is stored in the non-volatile memory, then the driving program can be easily updated, but the required capacity of the volatile memory increases and additional circuitry is required
Solution Approach 1:
The driving program is divided into two parts: a static part stored in the ROM and a changeable part stored in the non-volatile memory. This segmentation allows the changeable part to be updated without requiring large volatile memory capacity or additional complex circuitry, while the static part remains fixed in the ROM.
Solution Approach 2:
The host interface acts as an intermediary that receives update commands and data from the host, then coordinates the updating process by controlling the CPU and managing data flow between the host, volatile memory, and non-volatile memory, enabling updates without requiring excessive volatile memory capacity.
2Ease of manufacture
If the driving program is stored in the non-volatile memory, then the driving program can be easily updated, but additional circuitry and software are required to transmit the program
Solution Approach 1:
The host interface is designed to perform multiple functions: it serves as the communication interface with the host, manages the updating process of the driving program, controls the CPU reset operations, and coordinates data transfer between memory components. This multi-functionality eliminates the need for separate dedicated update circuitry.
Solution Approach 2:
The memory card performs its own program updating operation autonomously. The CPU executes the update application program stored in the non-volatile memory to update itself, and the host interface manages the entire update process without requiring external control circuitry beyond the existing components.
3Ease of manufacture
If the driving program is divided into two parts and stored in the ROM and non-volatile memory, then the driving program can be updated without additional costs, but the update application program must be present in the ROM
Solution Approach 1:
The update application program is copied from the non-volatile memory to the volatile memory during the update process. This copying allows the update application to be executed in the volatile memory environment while preserving the original update application in the non-volatile memory, enabling updates without modifying the ROM and eliminating the risk of ROM faults.
4Speed
If the driving program is stored in the ROM, then the driving program can be read directly and executed, but the driving program can only be updated by replacing the ROM
Solution Approach 1:
The driving program is segmented into a static part stored in the ROM for direct execution and a changeable part stored in the non-volatile memory for easy updating. This segmentation allows the static part to be executed directly from the ROM while the changeable part can be updated without replacing the ROM.
Data Source
AI summary
A memory card includes a bus a central processing unit (CPU) connected to the bus, a volatile memory connected to the bus, a nonvolatile memory, and a host interface. The host interface receives a first command signal from a host and outputs a reset signal for resetting the CPU, receives an update application program from the host and outputs it to the volatile memory, receives a second command signal from the host and outputs a reset release signal for releasing a reset state of the CPU, and receives an update program from the host and outputs it to the nonvolatile memory. The CPU executes the update application program stored in the volatile memory to output the update program to the nonvolatile memory in response to the reset release signal.