Memory Cell Array Charge Transfer via Potential Wells

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Current memory systems, such as three-dimensional NAND flash memories, face challenges in reducing the number of word lines while maintaining high storage capacity and low costs, which affects the efficiency of charge transfer and data storage.

Innovation Solution

A memory system with a memory cell array comprising a plurality of strings of memory cells connected in series, where a controller manages charge transfer between potential wells of the memory cells using a reduced number of word lines, allowing charges to be transferred between adjacent memory cells by varying voltages applied to the word lines.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If the number of word lines is reduced to lower cost and simplify structure, then device complexity and cost decrease, but charge transfer efficiency and data storage capability deteriorate

Engineering Contradiction:
Improvenumber of word linesVSAvoidcharge transfer efficiency
Core Design Contradiction:
Device complexityVSProductivity

Solution Approach 1:

The memory cells in each string are divided into multiple potential wells (first potential well, second potential well, third potential well) that can independently hold charges. This segmentation allows charge transfer to be controlled in discrete steps using fewer word lines, resolving the contradiction between reducing word line count and maintaining charge transfer efficiency.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Charges are preliminarily held in the first potential well before being transferred to the second potential well, and then to the third potential well. This preliminary positioning of charges enables efficient multi-value data storage with reduced word lines, as each potential well transition can be controlled by a specific word line voltage change.

Inventive Principle:
Principle #10Preliminary action

2Device complexity

If the number of word lines is reduced to simplify structure, then manufacturing cost decreases, but storage capacity deteriorates

Engineering Contradiction:
Improvenumber of word linesVSAvoidstorage capacity
Core Design Contradiction:
Device complexityVSQuantity of substance

Solution Approach 1:

The patent introduces a temporal dimension to charge storage by using sequential potential well transitions (first → second → third potential well) controlled by different voltage levels on the same word line. This allows multi-value data storage without increasing the spatial dimension of word lines, resolving the contradiction between structure simplification and storage capacity.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

Charges are preliminarily positioned in the first potential well, which serves as a charge holding region before transfer. This preliminary action enables the system to store multiple charge states (0, 1, 2, 3 charges) in a single memory cell string, increasing storage capacity while using fewer word lines.

Inventive Principle:
Principle #10Preliminary action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration enables efficient data storage and retrieval with reduced word lines, enhancing storage capacity and cost-effectiveness by stabilizing charge holding in potential wells, allowing for multi-value data storage and improved operational efficiency.

Implementation Method 1

a controller configured to perform control of transferring charges to be stored in the plurality of memory cells in the string or transferring charges according to stored data, between potential wells of channels in the plurality of memory cells

Methodology Applied
Scientific EffectElectrostatics: Electrostatics

Data Source

PatentUS11862246B2Memory system
Publication Date: 2024.01.02 KIOXIA CORP
  • US11862246B2 patent drawing
  • US11862246B2 patent drawing
  • US11862246B2 patent drawing

AI summary

A memory system has a memory cell array having a plurality of strings, the plurality of strings each having a plurality of memory cells connected in series, and a controller configured to perform control of transferring charges to be stored in the plurality of memory cells in the string or transferring charges according to stored data, between potential wells of channels in the plurality of memory cells.