Non-Volatile Memory Cell Asymmetry for Determinate Data States
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Solution Overview
Problem
Conventional non-volatile memory devices face indeterminate storage data in the initial state, leading to defective product testing issues, which are addressed by configuring transistors with different initial drain currents and using hot carrier injection to fix data to '0' and change it to '1'.
Innovation Solution
A non-volatile memory device design with a storage circuit that includes a memory cell and a reference element, where hot carrier injection changes the gate threshold voltage of one transistor, allowing for clear data states and error correction using an OR or AND circuit to maintain data integrity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If transistors are configured with the same initial characteristics, then the memory device can perform hot carrier injection to change characteristics, but the storage data in the initial state becomes indeterminate
Solution Approach 1:
The patent applies asymmetry by configuring transistors with different initial characteristics. Specifically, the first transistor has a larger initial drain current than the second transistor, creating an asymmetric initial state that deterministically represents logical '0'. This asymmetric configuration eliminates the indeterminate state problem while maintaining the hot carrier injection mechanism for data writing.
Solution Approach 2:
The patent inverts the conventional approach by making the initial state asymmetric rather than symmetric. Instead of starting with identical transistors and using hot carrier injection to create differences, the patent starts with different transistors and uses hot carrier injection to maintain or enhance the difference, thereby ensuring deterministic initial data states.
2Reliability
If transistors are configured with different initial drain currents to fix storage data, then data state determinacy is improved, but the circuit area increases due to multiple data areas and error correction circuits
Solution Approach 1:
The patent merges the storage function and error correction function into a unified structure. By configuring transistors with different initial characteristics within the same memory cell, the patent eliminates the need for separate error correction circuits and multiple data areas, thereby reducing circuit area while maintaining data integrity through the inherent asymmetric configuration.
Solution Approach 2:
The patent makes the memory cell structure universal by integrating multiple functions into a single configuration. The asymmetric transistor configuration simultaneously provides data storage, initial state determination, and error prevention functions, eliminating the need for separate dedicated error correction circuits and reducing overall circuit area.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution ensures determinate data states and improves circuit area efficiency by reducing the need for multiple data areas and error correction circuits, enhancing reliability and reducing defects.
Implementation Method 1
A non-volatile memory device uses hot carrier injection into a transistor
Data Source
AI summary
A non-volatile memory device (100) comprises a memory cell (11A, 11B) that is, in an initial state, in a state of having storage data of a first logical value stored therein, and that is, after execution of a program operation, in a state of having storage data of a second logical value stored therein, and an error correction circuit (14) that corrects only an error caused by a change in logical value of the storage data stored in the memory cell from the second logical value to the first logical value.