Semiconductor Memory Cell Durability via Bidirectional Write Control

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Solution Overview

Problem

Nonvolatile semiconductor memory apparatuses face durability issues due to fixed write cycles, leading to degradation of memory cells as data is repeatedly written, which affects their ability to function normally.

Innovation Solution

A semiconductor memory apparatus is designed with a memory cell, a switching driving control circuit, a first switching driving circuit, and a second switching driving circuit, where the switching driving control circuit generates control signals to alternate between two driving voltages applied to the bit line and the memory cell, allowing the direction of current through the memory element to change with each write pulse or preset number of pulses, thereby slowing composition changes and enhancing durability.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If data is repeatedly written in the memory cell of the nonvolatile memory apparatus, then the data storage capacity is maintained, but the composition of the memory cell changes and the memory cell cannot perform normal function

Engineering Contradiction:
Improvememory cell functionalityVSAvoidmemory cell composition
Core Design Contradiction:
ReliabilityVSStability of the object's composition

Solution Approach 1:

The patent applies dynamics by making the writing direction changeable through the use of two bit lines (first bit line and second bit line) and two word lines (first word line and second word line). The writing direction is dynamically switched between upward (from first bit line to second bit line) and downward (from second bit line to first bit line) by controlling the activation of different word lines, preventing composition degradation in a fixed direction.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent implements periodic action by alternately switching the writing direction between upward and downward with each write pulse or after a preset number of pulses. This periodic reversal of current direction through the memory cell prevents cumulative composition changes that would occur with unidirectional writing, thereby maintaining memory cell functionality over extended periods.

Inventive Principle:
Principle #19Periodic action

2Productivity

If the number of times data is written in the memory cell is increased, then the data storage capacity is maintained, but the memory cell may not be able to perform a normal function

Engineering Contradiction:
Improvedata write次数VSAvoidmemory cell functionality
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent applies dynamics by making the writing direction changeable through the use of two bit lines (first bit line and second bit line) and two word lines (first word line and second word line). The writing direction is dynamically switched between upward (from first bit line to second bit line) and downward (from second bit line to first bit line) by controlling the activation of different word lines, preventing composition degradation in a fixed direction.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent implements periodic action by alternately switching the writing direction between upward and downward with each write pulse or after a preset number of pulses. This periodic reversal of current direction through the memory cell prevents cumulative composition changes that would occur with unidirectional writing, thereby maintaining memory cell functionality over extended periods.

Inventive Principle:
Principle #19Periodic action

Data Source

PatentUS10269424B2Semiconductor memory apparatus
Publication Date: 2019.04.23 MIMIRIP LLC
  • US10269424B2 patent drawing
  • US10269424B2 patent drawing
  • US10269424B2 patent drawing

AI summary

A semiconductor memory apparatus may be provided. The semiconductor memory apparatus may include a memory element. The semiconductor memory apparatus may include a first switching driving circuit coupled to the memory element. The semiconductor memory apparatus may include a second switching driving circuit coupled to the memory element.