Memory Cell Protrusion Profile to Prevent DRAM Bridging
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Solution Overview
Problem
As semiconductor fabrication technology advances, reducing transistor sizes to a few nanometers leads to issues with short circuits and bridging in DRAM cells, resulting in performance drops and manufacturing challenges.
Innovation Solution
A method involving a semiconductor substrate with a fin portion, a semiconductive layer, a conductive layer, and an insulating layer, where an electric field at a predetermined angle is applied during dry etching to form a protrusion with an undercut profile, reducing the risk of short circuits by shortening the protrusions and maintaining a desirable distance from contact plugs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If transistor size is reduced to a few nanometers to improve device density, then productivity is improved, but short circuit or bridging occurs resulting in reliability degradation
Solution Approach 1:
The patent applies preliminary action by forming an angled protrusion structure in the memory cell layers before contact plug formation. This pre-formed angled structure (with sides extending at 5-50 degrees from vertical) creates built-in spacing that prevents short circuits before they can occur, allowing continued miniaturization while maintaining reliability.
Solution Approach 2:
The patent employs asymmetry by creating protrusions with angled sides (5-50 degrees from vertical) rather than symmetric vertical walls. This asymmetric geometry provides lateral spacing between adjacent memory cells and contact plugs, preventing bridging while enabling higher device density through more efficient space utilization.
2Ease of manufacture
If conventional vertical protrusion structure is used, then manufacturing is simpler, but short circuit risk increases due to larger protrusion footprint
Solution Approach 1:
The patent replaces symmetric vertical protrusions with asymmetric angled protrusions (5-50 degrees from vertical). This asymmetric design reduces the lateral footprint of protrusions while maintaining vertical continuity, thereby reducing short circuit risk without significantly complicating the manufacturing process.
Solution Approach 2:
The patent addresses the short circuit risk by introducing an angular dimension to the protrusion geometry. Instead of only vertical extent, the protrusions now have controlled lateral angles, effectively using angular geometry to reduce footprint and prevent bridging while maintaining manufacturing feasibility.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Prevents or minimizes short circuits and bridging between memory cells and contact plugs, enhancing the reliability and performance of memory devices by controlling the protrusion height and distance effectively.
Implementation Method 1
applying an electric field at a first predetermined angle toward a plasma to remove a portion of the insulating material exposed through the patterned photoresist to form an insulating layer, to remove a portion of the conductive material under the portion of the insulating material to form a conductive layer, and to remove a portion of the semiconductive material under the portion of the insulating material to form a semiconductive layer
Data Source
AI summary
The present application provides a method of manufacturing a memory device. The method includes steps of providing a semiconductor substrate having a fin portion protruding from a surface of the semiconductor substrate; disposing a semiconductive material over the semiconductor substrate and conformal to the fin portion; disposing a conductive material over the semiconductive material; disposing an insulating material over the conductive material; disposing a patterned photoresist over the insulating material; applying an electric field at a first predetermined angle toward a plasma to remove a portion of the insulating material exposed through the patterned photoresist to form an insulating layer, to remove a portion of the conductive material under the portion of the insulating material to form a conductive layer, and to remove a portion of the semiconductive material under the portion of the insulating material to form a semiconductive layer; and removing the patterned photoresist from the insulating layer.