Semiconductor Memory Cell CMP Layout for Regional Step Uniformity
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Solution Overview
Problem
The high integration of semiconductor data storage elements leads to reliability issues due to step differences between core, peripheral, and cell regions, which are not effectively addressed by conventional polishing processes.
Innovation Solution
A semiconductor device design that minimizes step differences between core, peripheral, and cell regions through a chemical mechanical polishing (CMP) process using abrasive particles, ensuring uniformity and reliability by maintaining a step difference of 0.1 nm to 5 nm.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If high integration is implemented to increase data storage capacity, then the quantity of data storage elements increases, but step differences between core, peripheral, and cell regions worsen, leading to reliability deterioration
Solution Approach 1:
The substrate is divided into distinct regions (core region, peripheral region, cell region) with different polishing conditions applied to each. This segmentation allows optimization of polishing parameters for each specific region to minimize step differences while maintaining high integration density.
Solution Approach 2:
Different polishing slurries with varying abrasive particle characteristics are applied to different regions of the substrate. The cell region receives polishing treatment with first abrasive particles, while the core and peripheral regions receive treatment with second abrasive particles having different properties, creating local quality variations that address regional step difference issues.
2Ease of manufacture
If conventional polishing processes are used to maintain manufacturing simplicity, then the ease of manufacture is preserved, but the ability to minimize step differences between regions is insufficient, worsening manufacturing precision
Solution Approach 1:
The polishing process parameters are changed by using abrasive particles with different average diameters for different regions. The first abrasive particles have a first average diameter optimized for the cell region, while the second abrasive particles have a second average diameter optimized for the core and peripheral regions, enabling precise control of step differences without complicating the overall manufacturing process.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution enhances the reliability and yield of semiconductor devices by maintaining uniform critical dimensions and preventing non-uniformity in the CMP process, reducing defects and improving manufacturing efficiency.
Implementation Method 1
One of the polishing processes may be chemical mechanical polishing (CMP). The chemical mechanical polishing is a process of planarizing a surface of the substrate with pressing and rotating, which includes providing a polishing slurry containing abrasive particles between a polishing pad and a semiconductor substrate to be polished and contacting the semiconductor substrate with the polishing pad and rotating.
Data Source
AI summary
A semiconductor device includes a substrate including a first active pattern having first and second source/drain regions of a cell region, a device isolation layer in a trench defining the first active pattern on the cell region, a buffer layer on the cell region, a line structure extends in a third direction, extends from the cell region to a boundary region, and including a first conductive pattern that passes through the buffer layer and contacts the first source/drain region, a bit line on the first conductive pattern, and a first barrier pattern between the bit line and the first conductive pattern, a pair of spacers respectively on both sidewalls of the line structure, a contact on the second source/drain region, a landing pad on the contact, a first abrasive particle between the contact and the landing pad, and a data storage element on the landing pad.