Stacked Memory Cell Contact Area Adjustment for Reset Current Uniformity
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Solution Overview
Problem
Memory devices with vertically stacked cross-point array structures face inconsistencies in electrical characteristics, such as reset current and voltage, due to differences in materials and heterojunction structures between upper and lower memory cells, leading to varying Peltier effects and operational characteristics.
Innovation Solution
A semiconductor device design featuring vertically stacked cell structures with symmetric first and second cell structures, each comprising a selection pattern, a variable resistance pattern, and a heating electrode, where the contact areas and resistances between the variable resistance patterns and heating electrodes are adjusted to ensure uniform electrical characteristics across both structures.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If vertically stacked cross-point array structures are manufactured with heterojunction materials, then device integration and memory capacity are improved, but electrical characteristics such as reset current and voltage become inconsistent across different memory cells
Solution Approach 1:
The patent applies local quality by making the contact area between the heating electrode and variable resistance pattern a variable parameter. Specifically, the first contact area (lower memory cell) is designed to be larger than the second contact area (upper memory cell), allowing local adjustment of electrical characteristics to compensate for the Peltier effect differences caused by heterojunction materials in vertically stacked structures.
Solution Approach 2:
The patent changes physical parameters by varying the contact area between heating electrodes and variable resistance patterns at different vertical levels. The first heating electrode has a first contact area with the first variable resistance pattern, while the second heating electrode has a second contact area with the second variable resistance pattern, where these contact areas are deliberately made different to normalize reset currents across stacked memory cells.
2Adaptability or versatility
If different materials are used for conductive layers in stacked memory cells, then device functionality and memory cell structure are improved, but Peltier effect varies causing different reset currents in first and second memory cells
Solution Approach 1:
The patent applies asymmetry by deliberately designing the first contact area to be larger than the second contact area. This asymmetric configuration compensates for the symmetric Peltier effect variations that occur in vertically stacked heterojunction structures, allowing the first memory cell and second memory cell to have uniform reset currents despite using different materials and current directions.
3Reliability
If contact areas between variable resistance patterns and heating electrodes are made different, then reset current uniformity is improved, but manufacturing complexity increases
Solution Approach 1:
The patent applies preliminary action by establishing the different contact areas during the initial fabrication process. The first contact area and second contact area are designed with different dimensions from the outset, allowing the heterojunction stacked memory cells to achieve uniform electrical characteristics without requiring additional adjustment steps or complex control mechanisms during operation.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution achieves uniform electrical characteristics for both upper and lower cell structures, reducing differences in reset currents and enhancing the overall performance of the memory device by controlling contact areas and resistances.
Implementation Method 1
a first heating electrode... a second heating electrode
Implementation Method 2
The currents passing through the junctions of these dissimilar materials for the first and second memory cells may be in different direction. Thus, the Peltier effect may differently occur in the first and second memory cells
Data Source
AI summary
The semiconductor device includes a plurality of first conductive patterns on a substrate, a first selection pattern on each of the plurality of first conductive patterns, a first structure on the first selection pattern, a plurality of second conductive patterns on the first structures, a second selection pattern on each of the plurality of second conductive patterns, a second structure on the second selection pattern, and a plurality of third conductive patterns on the second structures. Each of the plurality first conductive patterns may extend in a first direction. The first structure may include a first variable resistance pattern and a first heating electrode. The first variable resistance pattern and the first heating electrode may contact each other to have a first contact area therebetween. Each of the plurality of second conductive patterns may extend in a second direction crossing the first direction. The second structure may include a second variable resistance pattern and a second heating electrode. The second variable resistance pattern and the second heating electrode may contact each other to have a second contact area therebetween, and the second contact area may be different from the first contact area.