Memory Cell Data State Determination via Stepped and Ramped Sensing
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Solution Overview
Problem
As memory operation advances to represent additional data states per memory cell, the shrinking margins between adjacent threshold voltage ranges lead to inaccurate determination of data states due to voltage shifts over time, especially in multi-level cell configurations like MLC, TLC, and QLC.
Innovation Solution
Implementing a method that uses a combination of stepped and ramped sensing techniques during programming and reading operations, with correction factors applied based on the position of memory cells relative to string drivers to compensate for voltage differences and RC time constants, ensuring accurate data state determination.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If multi-level cell configurations (MLC, TLC, QLC) are used to increase storage capacity, then more data states can be stored per memory cell, but the margins between adjacent threshold voltage ranges shrink leading to inaccurate data state determination
Solution Approach 1:
The patent applies preliminary action by performing a first read operation before the second read operation to establish a reference voltage level. The first read operation captures the initial state of the memory cell, and this information is used to adjust and compensate for voltage shifts in subsequent read operations. This preliminary measurement enables more accurate determination of data states in multi-level cell configurations by accounting for temporal voltage variations.
Solution Approach 2:
The patent implements parameter changes by dynamically adjusting read voltage levels based on observed voltage shifts. The system modifies the voltage applied during read operations to compensate for threshold voltage drift over time. By changing the voltage parameter adaptively rather than using fixed voltage levels, the system maintains accurate data state determination even as threshold voltages shift, thereby resolving the contradiction between increased storage capacity and measurement precision.
2Quantity of substance
If threshold voltage ranges are compressed to fit more data states in each memory cell, then storage density increases, but voltage shifts over time cause overlapping or misclassification of data states
Solution Approach 1:
The patent applies feedback by using the result of the first read operation to inform and adjust the second read operation. The voltage level determined from the first read feeds back into the reading process, allowing the system to compensate for voltage shifts. This feedback mechanism ensures that even with compressed threshold voltage ranges for higher storage density, the system can accurately distinguish between adjacent data states by adapting to actual voltage conditions observed during operation.
3Productivity
If standard reading operations are used without correction, then the process is simple and fast, but voltage shifts and RC time constants cause read errors especially in cells far from string drivers
Solution Approach 1:
The patent uses preliminary action by performing a first read operation that establishes baseline voltage information before the actual data read. This preliminary step captures voltage characteristics including RC time constant effects, and this information is then used to correct measurements in the second read operation. This approach maintains relatively fast operation while improving voltage level accuracy for cells at various distances from string drivers.
Solution Approach 2:
The patent implements parameter changes by adjusting read voltage levels based on the position of memory cells relative to string drivers and observed voltage shifts. The system modifies voltage parameters dynamically to compensate for RC time constant effects and spatial variations in voltage delivery. This enables accurate reading across the entire memory array while maintaining operational efficiency.
Data Source
AI summary
Methods of operating a memory, and apparatus configured to perform similar methods, include determining a voltage level of a stepped sense operation that activates a memory cell of the memory during a programming operation for the memory cell, and determining a voltage level of a ramped sense operation that activates the memory cell during a read operation for the memory cell.


