Memory Cell Voltage Sweeps With Delta Compression for Threshold Detection

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Solution Overview

Problem

Existing memory systems face challenges in accurately identifying threshold voltages of memory cells while minimizing data storage requirements, as current methods either consume excessive memory resources or provide inaccurate representations of cell failures.

Innovation Solution

The memory system controller performs a voltage sweep operation by applying incremental voltages to memory cells, recording transition differences, and compressing delta values to identify accurate threshold voltages while reducing data storage through bit shifting and maintaining signed integer values.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If a voltage sweep operation is performed to accurately identify threshold voltages of memory cells, then measurement precision is improved, but data storage requirements increase

Engineering Contradiction:
Improvethreshold voltage identification accuracyVSAvoiddata storage requirements
Core Design Contradiction:
Measurement precisionVSQuantity of substance

Solution Approach 1:

The patent extracts only the essential information needed for threshold voltage identification by recording transition differences between consecutive voltage iterations rather than storing complete read data for each iteration. This selective extraction of critical data points maintains measurement precision while significantly reducing the quantity of data that must be stored.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

Instead of storing raw read data and processing it to find transitions, the patent inverts the approach by directly calculating and storing only the transition differences between iterations. This inversion of the data processing workflow eliminates redundant data storage while preserving the information needed for accurate threshold voltage identification.

Inventive Principle:
Principle #13The other way round (Inversion)

2Reliability

If traditional voltage sweep methods are used to identify memory cell failures, then reliability is improved, but loss of time increases

Engineering Contradiction:
Improvememory cell failure identification accuracyVSAvoidvoltage sweep operation duration
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent extracts only the critical transition information from each voltage iteration, storing merely the difference in read values between consecutive iterations. This extraction of essential data eliminates redundant processing and storage operations, significantly reducing the time required to complete voltage sweep operations while maintaining the ability to accurately identify memory cell failures.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent performs partial action by conducting multiple voltage iterations but storing complete data for only a subset of these iterations. Specifically, it stores transition differences for all iterations but retains full read data for only certain iterations, thereby reducing overall data storage requirements and operation time while maintaining sufficient information for reliable failure identification.

Inventive Principle:
Principle #16Partial or excessive action

Data Source

PatentUS12443361B2Methods for performing voltage sweep operations
Publication Date: 2025.10.14 MICRON TECHNOLOGY INC
  • US12443361B2 patent drawing
  • US12443361B2 patent drawing
  • US12443361B2 patent drawing

AI summary

Methods, systems, and devices for methods for performing voltage sweep operations are described. Based on detecting a failure at a portion of a memory device, the memory system controller may initialize a voltage sweep operation to identify threshold voltages of the memory cells at the portion of the memory device. In one example, the memory system controller may identify and store a value (e.g., a delta value) that represents a difference between a quantity of transitions experienced by a first memory cell at a first voltage iteration and a quantity of transitions experienced by the first memory cell at a second voltage iteration. In another example, the memory system controller may identify the quantity of transitions from a first logic state to a second logic state and a quantity of transitions from the second logic state to a first logic state and store such values in respective memory arrays.