Memory Cell Drain Bias Adjustment for Second Bit Effect
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Solution Overview
Problem
Charge trapping memory cells face a 'second bit effect' that narrows the threshold voltage window during read operations, leading to reduced read disturb and programming accuracy due to interference between data stored at different parts of the nitride storage layer.
Innovation Solution
The implementation of a control circuitry that adjusts the drain bias based on the data values of neighboring memory cells, applying higher or lower voltages depending on the threshold voltages of adjacent bits to minimize interference and widen the available threshold voltage window.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If increased voltage magnitude is applied during reverse read operation to address the second bit effect, then the threshold voltage window is widened, but read disturb effect increases causing mistaken programming of neighboring bit
Solution Approach 1:
The patent applies different voltage magnitudes to different memory cells based on the data value stored in the neighboring bit. Specifically, a first voltage magnitude is applied to the addressed bit when the neighboring bit stores a first data value, and a second voltage magnitude is applied when the neighboring bit stores a second data value. This localized adaptation of voltage magnitude to specific memory cell conditions resolves the contradiction by widening the threshold voltage window only where needed while avoiding read disturb in cells where it is not needed.
Solution Approach 2:
The patent changes the voltage magnitude parameter during read operations based on the state of the neighboring bit. The control circuitry adjusts the voltage applied to the drain terminal from a first magnitude to a second magnitude depending on whether the neighboring bit stores a first or second data value. This dynamic parameter adjustment allows the system to optimize the threshold voltage window while minimizing read disturb effects.
2Ease of operation
If reverse read operation is performed on addressed bit, then read operation is enabled, but second bit effect reduces available threshold voltage window
Solution Approach 1:
The patent performs a preliminary read operation on the neighboring bit before reading the addressed bit. Based on the data value found in the neighboring bit, the control circuitry pre-determines the appropriate voltage magnitude to apply during the subsequent read operation on the addressed bit. This preliminary action allows the system to prepare the optimal read conditions, ensuring both ease of operation and adequate threshold voltage window.
Solution Approach 2:
The patent applies different voltage magnitudes to different memory cells based on the data value stored in the neighboring bit. Specifically, a first voltage magnitude is applied to the addressed bit when the neighboring bit stores a first data value, and a second voltage magnitude is applied when the neighboring bit stores a second data value. This localized adaptation of voltage magnitude to specific memory cell conditions resolves the contradiction by widening the threshold voltage window only where needed while avoiding read disturb in cells where it is not needed.
Data Source
AI summary
The storage layer such as a nitride layer of a nonvolatile memory cell has two storage parts storing separately addressable data, typically respectively proximate to the source terminal and the drain terminal. The applied drain voltage while sensing the data of one of the storage parts depends on the data stored at the other storage part; the different parts can be in different, neighboring memory cells. If the data stored at the other storage part is represented by a threshold voltage exceeding a minimum threshold voltage, then the applied drain voltage is raised. This technology is useful in read operations and program verify operations to widen the threshold voltage window.