Multi-bit Memory Cell Encoding for Flash Lifecycle Extension

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Solution Overview

Problem

The increasing bit density in flash memory cells leads to a marked decline in their lifecycle, making it challenging to maintain data integrity and reliability, especially in devices where certain data is frequently accessed or modified.

Innovation Solution

Implementing a system with encoding and decoding circuits that allow multi-bit memory cells to operate at different bit densities based on data characteristics, such as treating two-bit cells as single-bit cells to extend their lifecycle by differentiating charge levels and reducing the number of voltage thresholds used, thereby trading off bit density for increased lifespan.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If the number of distinct voltage levels in flash memory cells is increased to store more bits per cell, then memory density is improved, but the lifecycle of the flash memory deteriorates

Engineering Contradiction:
Improvememory densityVSAvoidlifecycle
Core Design Contradiction:
Quantity of substanceVSDuration of action of stationary object

Solution Approach 1:

The patent segments the flash memory device into multiple pools of memory cells, where each pool operates at a different bit density. This allows the system to divide high-density storage for infrequently accessed data and lower-density storage for frequently accessed data, thereby extending the overall lifecycle while maintaining high memory density.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent implements dynamic pool management where memory pools can be migrated between different bit density configurations. This dynamic adjustment allows the system to optimize between memory density and lifecycle based on actual usage patterns, enabling pools to transition between serving as high-density or extended-life pools as needed.

Inventive Principle:
Principle #15Dynamics

2Quantity of substance

If all memory cells operate at high bit density, then memory capacity is maximized, but reliability for frequently accessed data deteriorates

Engineering Contradiction:
Improvememory capacityVSAvoiddata integrity
Core Design Contradiction:
Quantity of substanceVSReliability

Solution Approach 1:

The patent applies different quality levels (bit densities) to different local regions (pools) of memory cells based on their specific usage requirements. Frequently accessed data is stored in pools operating at lower bit density with higher reliability, while infrequently accessed data is stored in pools operating at higher bit density, thus achieving both high overall capacity and high reliability for critical data.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS8289768B2Systems and methods for extended life multi-bit memory cells
Publication Date: 2012.10.16 AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE LTD
  • US8289768B2 patent drawing
  • US8289768B2 patent drawing
  • US8289768B2 patent drawing

AI summary

Various embodiments of the present invention provide for extended life operation of multi-bit memory cells. As an example, some embodiments of the present invention provide electronic systems that include a plurality of multi-bit memory cells, an encoding circuit and a decoding circuit. Each of the plurality of multi-bit memory cells is operable to hold at least two bits. The encoding circuit is operable to receive a data input including at least two data bits, and to encode the two data bits as an encoded output to the plurality of multi-bit memory cells. The encoded output may be selected to be either a single two bit output representing the two bits, or a series of two two bit outputs representing the two bits. The decoding circuit is operable to reverse the encoding applied by the encoding circuit.